Issued Patents All Time
Showing 76–100 of 462 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10840360 | Nanosheet device with close source drain proximity | Shogo Mochizuki, Alexander Reznicek | 2020-11-17 |
| 10833147 | Metal-insulator-metal capacitor structure | Kangguo Cheng, Theodoras E. Standaert, Junli Wang | 2020-11-10 |
| 10832961 | Sacrificial gate spacer regions for gate contacts formed over the active region of a transistor | Su Chen Fan, Ruilong Xie, Andre P. Labonte, Chanro Park | 2020-11-10 |
| 10832916 | Self-aligned gate isolation with asymmetric cut placement | Ruilong Xie, Carl Radens, Kangguo Cheng | 2020-11-10 |
| 10833192 | Substantially defect free relaxed heterogeneous semiconductor fins on bulk substrates | Oleg Gluschenkov, Shogo Mochizuki, Alexander Reznicek | 2020-11-10 |
| 10833155 | Vertical field effect transistor with top and bottom airgap spacers | Chun-Chen Yeh, Junli Wang, Alexander Reznicek | 2020-11-10 |
| 10833149 | Capacitors | Kangguo Cheng, Christopher J. Penny, Theodorus E. Standaert, Junli Wang | 2020-11-10 |
| 10825891 | Metal-insulator-metal capacitor structure | Kangguo Cheng, Theodorus E. Standaert, Junli Wang | 2020-11-03 |
| 10825890 | Metal-insulator-metal capacitor structure | Kangguo Cheng, Theodorus E. Standaert, Junli Wang | 2020-11-03 |
| 10784365 | Fin field effect transistor fabrication and devices having inverted T-shaped gate | Zuoguang Liu, Tenko Yamashita, Chun-Chen Yeh | 2020-09-22 |
| 10770388 | Transistor with recessed cross couple for gate contact over active region integration | Ruilong Xie, Kangguo Cheng, Jia Zeng, Youngtag Woo, Mahender Kumar +1 more | 2020-09-08 |
| 10734518 | Substantially defect free relaxed heterogeneous semiconductor fins on bulk substrates | Oleg Gluschenkov, Shogo Mochizuki, Alexander Reznicek | 2020-08-04 |
| 10707128 | Fabrication of self-aligned gate contacts and source/drain contacts directly above gate electrodes and source/drains | Kangguo Cheng, Theodorus E. Standaert, Junli Wang | 2020-07-07 |
| 10699962 | FinFET devices | Kangguo Cheng, Theodorus E. Standaert, Junli Wang | 2020-06-30 |
| 10692989 | Replacement metal gate structures | Kangguo Cheng, Theodorus E. Standaert, Junli Wang | 2020-06-23 |
| 10685866 | Fin isolation to mitigate local layout effects | Huimei Zhou, Gen Tsutsui, Andrew M. Greene, Dechao Guo, Huiming Bu +2 more | 2020-06-16 |
| 10679939 | Electrical fuse and/or resistor structures | Kangguo Cheng, Ali Khakifirooz, Juntao Li | 2020-06-09 |
| 10672887 | Vertical FET with shaped spacer to reduce parasitic capacitance | Junli Wang, Kangguo Cheng, Theodorus E. Standaert | 2020-06-02 |
| 10658224 | Method of fin oxidation by flowable oxide fill and steam anneal to mitigate local layout effects | Huimei Zhou, Gen Tsutsui, Andrew M. Greene, Dechao Guo, Huiming Bu +1 more | 2020-05-19 |
| 10651295 | Forming a fin using double trench epitaxy | Pouya Hashemi, Shogo Mochizuki, Alexander Reznicek | 2020-05-12 |
| 10629709 | Punch through stopper in bulk finFET device | Zuoguang Liu, Tenko Yamashita, Chun-Chen Yeh | 2020-04-21 |
| 10622379 | Structure and method to form defect free high-mobility semiconductor fins on insulator | Oleg Gluschenkov, Shogo Mochizuki, Alexander Reznicek | 2020-04-14 |
| 10607890 | Selective removal of semiconductor fins | Kangguo Cheng, Ali Khakifirooz | 2020-03-31 |
| 10593779 | Replacement metal gate structures | Kangguo Cheng, Theodorus E. Standaert, Junli Wang | 2020-03-17 |
| 10593679 | Static random access memory (SRAM) density scaling by using middle of line (MOL) flow | Kangguo Cheng, Sivananda K. Kanakasabapathy, Theodorus E. Standaert, Junli Wang | 2020-03-17 |