Issued Patents All Time
Showing 76–100 of 118 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7391097 | Secure electrically programmable fuse | Chandrasekharan Kothandaraman | 2008-06-24 |
| 7388244 | Trench metal-insulator-metal (MIM) capacitors and method of fabricating same | Herbert L. Ho, Vidhya Ramachandran | 2008-06-17 |
| 7323761 | Antifuse structure having an integrated heating element | Byeongju Park, Chandrasekheran Kothandaraman | 2008-01-29 |
| 7276751 | Trench metal-insulator-metal (MIM) capacitors integrated with middle-of-line metal contacts, and method of fabricating same | Herbert L. Ho, Vidhya Ramachandran | 2007-10-02 |
| 7270269 | Secure electronic voting device | Gregory J. Fredeman, Chandrasekharan Kothandaraman, Alan J. Leslie | 2007-09-18 |
| 7227207 | Dense semiconductor fuse array | Byeongju Park, Chandrasekharan Kothandaraman | 2007-06-05 |
| 7200064 | Apparatus and method for providing a reprogrammable electrically programmable fuse | David William Boerstler, Eskinder Hailu, Jieming Qi | 2007-04-03 |
| 7193262 | Low-cost deep trench decoupling capacitor device and process of manufacture | Herbert L. Ho, John E. Barth, Jr., Ramachandra Divakaruni, Wayne F. Ellis, Johnathan E. Faltermeier +4 more | 2007-03-20 |
| 7078247 | Early detection of contact liner integrity by chemical reaction | Lawrence Bauer, Jr., Kenneth J. Giewont, Bosang Kim, Jeffrey Lloyd, Peter S. Locke +4 more | 2006-07-18 |
| 6821857 | High on-current device for high performance embedded DRAM (eDRAM) and method of forming the same | Babar A. Khan, Rama Divakaruni, Tzyy-Ming Cheng | 2004-11-23 |
| 6747890 | Gain cell structure with deep trench capacitor | Toshiaki Kirihata, John W. Golz | 2004-06-08 |
| 6686617 | Semiconductor chip having both compact memory and high performance logic | Paul D. Agnello, Bomy Chen, Scott W. Crowder, Ramachandra Divakaruni, Dennis Sinitsky | 2004-02-03 |
| 6624499 | System for programming fuse structure by electromigration of silicide enhanced by creating temperature gradient | Chandrasekharan Kothandaraman, S. Sundar Kumar Iyer, Chandrasekhar Narayan | 2003-09-23 |
| 6507511 | Secure and dense SRAM cells in EDRAM technology | John E. Barth, Jr., Babar A. Khan, Robert C. Wong | 2003-01-14 |
| 6486043 | Method of forming dislocation filter in merged SOI and non-SOI chips | Robert Hannon, Herbert L. Ho, S. Sundar Kumar Iyer | 2002-11-26 |
| 6436760 | Method for reducing surface oxide in polysilicon processing | Kwong Hon Wong, Ashima B. Chakravarti, Satya N. Chakravarti | 2002-08-20 |
| 6433404 | Electrical fuses for semiconductor devices | Sundar Iyer, Chandcasekhar Narayan, Axel Brintzinger | 2002-08-13 |
| 6410399 | Process to lower strap, wordline and bitline contact resistance in trench-based DRAMS by silicidization | Philip L. Flaitz, Herbert L. Ho, Babar A. Khan, Paul C. Parries | 2002-06-25 |
| 6353246 | Semiconductor device including dislocation in merged SOI/DRAM chips | Robert Hannon, Scott R. Stiffler, Kevin R. Winstel | 2002-03-05 |
| 6340615 | Method of forming a trench capacitor DRAM cell | Sundar Iyer, Rama Divakaruni, Herbert L. Ho, Babar A. Khan | 2002-01-22 |
| 6339228 | DRAM cell buried strap leakage measurement structure and method | Sundar Iyer, Satya N. Chakravarti | 2002-01-15 |
| 6323535 | Electrical fuses employing reverse biasing to enhance programming | Sundar Iyer, Peter Smeys, Chandrasekhar Narayan, Axel Brintzinger | 2001-11-27 |
| 6287913 | Double polysilicon process for providing single chip high performance logic and compact embedded memory structure | Paul D. Agnello, Bomy Chen, Scott W. Crowder, Ramachandra Divakaruni, Dennis Sinitsky | 2001-09-11 |
| 6261876 | Planar mixed SOI-bulk substrate for microelectronic applications | Scott W. Crowder, Robert Hannon | 2001-07-17 |
| 6096580 | Low programming voltage anti-fuse | S. Sundar Kumar Iyer, Liang Han, Robert Hannon, Mukesh V. Khare | 2000-08-01 |