Issued Patents All Time
Showing 26–50 of 118 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9436845 | Physically unclonable fuse using a NOR type memory array | Toshiaki Kirihata, Chandrasekharan Kothandaraman, Derek H. Leu, Sami Rosenblatt | 2016-09-06 |
| 9431340 | Wiring structure for trench fuse component with methods of fabrication | Toshiaki Kirihata, Edward P. Maciejewski, Chengwen Pei, Deepal Wehella-Gamage | 2016-08-30 |
| 9431339 | Wiring structure for trench fuse component with methods of fabrication | Toshiaki Kirihata, Edward P. Maciejewski, Chengwen Pei, Deepal Wehella-Gamage | 2016-08-30 |
| 9406561 | Three dimensional integrated circuit integration using dielectric bonding first and through via formation last | Mukta G. Farooq, Robert Hannon, Emily R. Kinser | 2016-08-02 |
| 9368489 | Interconnect circuits at three-dimensional (3-D) bonding interfaces of a processor array | Rodrigo Alvarez-Icaza Rivera, John V. Arthur, John E. Barth, Jr., Andrew S. Cassidy, Bryan L. Jackson +3 more | 2016-06-14 |
| 9363137 | Faulty core recovery mechanisms for a three-dimensional network on a processor array | Rodrigo Alvarez-Icaza Rivera, John V. Arthur, John E. Barth, Jr., Andrew S. Cassidy, Paul A. Merolla +1 more | 2016-06-07 |
| 9236389 | Embedded flash memory fabricated in standard CMOS process with self-aligned contact | Kangguo Cheng, Ramachandra Divakaruni, Ali Khakifirooz | 2016-01-12 |
| 9208878 | Non-volatile memory based on retention modulation | Toshiaki Kirihata, Chandrasekharan Kothandaraman | 2015-12-08 |
| 9184129 | Three-terminal antifuse structure having integrated heating elements for a programmable circuit | Byeongju Park, Chandrasekharan Kothandaraman | 2015-11-10 |
| 9160617 | Faulty core recovery mechanisms for a three-dimensional network on a processor array | Rodrigo Alvarez-Icaza Rivera, John V. Arthur, John E. Barth, Jr., Andrew S. Cassidy, Paul A. Merolla +1 more | 2015-10-13 |
| 9038133 | Self-authenticating of chip based on intrinsic features | Srivatsan Chellappa, Toshiaki Kirihata, Sami Rosenblatt | 2015-05-19 |
| 9029988 | Through silicon via in n+ epitaxy wafers with reduced parasitic capacitance | Kangguo Cheng, Pranita Kerber, Ali Khakifirooz | 2015-05-12 |
| 9025386 | Embedded charge trap multi-time-programmable-read-only-memory for high performance logic technology | Toshiaki Kirihata, Chandrasekharan Kothandaraman, Derek H. Leu, Dan Moy | 2015-05-05 |
| 9021411 | Characterizing TSV structures in a semiconductor chip stack | Anand Haridass, Saravanan Sethuraman, Ming Yin | 2015-04-28 |
| 8990616 | Final faulty core recovery mechanisms for a two-dimensional network on a processor array | Rodrigo Alvarez-Icaza Rivera, John V. Arthur, John E. Barth, Jr., Andrew S. Cassidy, Paul A. Merolla +1 more | 2015-03-24 |
| 8962448 | Computer readable medium encoded with a program for fabricating 3D integrated circuit device using interface wafer as permanent carrier | Mukta G. Farooq, Robert Hannon, Steven J. Koester, Fei Liu, Sampath Purushothaman +2 more | 2015-02-24 |
| 8822141 | Front side wafer ID processing | Mukta G. Farooq, Robert Hannon, Kevin S. Petrarca, Stuart A. Sieg | 2014-09-02 |
| 8738167 | 3D integrated circuit device fabrication with precisely controllable substrate removal | Mukta G. Farooq, Robert Hannon, Steven J. Koester, Sampath Purushothaman, Roy R. Yu | 2014-05-27 |
| 8674515 | 3D integrated circuits structure | Mukta G. Farooq, Steven J. Koester, Huilong Zhu | 2014-03-18 |
| 8664081 | Method for fabricating 3D integrated circuit device using interface wafer as permanent carrier | Mukta G. Farooq, Robert Hannon, Steven J. Koester, Fei Liu, Sampath Purushothaman +2 more | 2014-03-04 |
| 8658535 | Optimized annular copper TSV | Paul S. Andry, Mukta G. Rarooq, Robert Hannon, Emily R. Kinser, Comelia K. Tsang +1 more | 2014-02-25 |
| 8637958 | Structure and method for forming isolation and buried plate for trench capacitor | Abhishek Dube, Babar A. Khan, Oh-Jung Kwon, Junedong Lee, Paul C. Parries +4 more | 2014-01-28 |
| 8629017 | Structure and method to form EDRAM on SOI substrate | Chengwen Pei, Kangguo Cheng, Herbert L. Ho, Byeong Y. Kim, Geng Wang +1 more | 2014-01-14 |
| 8629553 | 3D integrated circuit device fabrication with precisely controllable substrate removal | Mukta G. Farooq, Robert Hannon, Steven J. Koester, Sampath Purushothaman, Roy R. Yu | 2014-01-14 |
| 8590010 | Retention based intrinsic fingerprint identification featuring a fuzzy algorithm and a dynamic key | Daniel Jacob Fainstein, Alberto Cestero, Toshiaki Kirihata, Norman W. Robson, Sami Rosenblatt | 2013-11-19 |