Issued Patents All Time
Showing 1–23 of 23 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8963283 | Method of fabricating isolated capacitors and structure thereof | Oh-Jung Kwon, Paul C. Parries, Dominic J. Schepis | 2015-02-24 |
| 8940617 | Method of fabricating isolated capacitors and structure thereof | Oh-Jung Kwon, Paul C. Parries, Dominic J. Schepis | 2015-01-27 |
| 8716776 | Method of fabricating isolated capacitors and structure thereof | Oh-Jung Kwon, Paul C. Parries, Dominic J. Schepis | 2014-05-06 |
| 8685806 | Silicon-on-insulator substrate with built-in substrate junction | Thomas W. Dyer, Dominic J. Schepis | 2014-04-01 |
| 8652925 | Method of fabricating isolated capacitors and structure thereof | Oh-Jung Kwon, Paul C. Parries, Dominic J. Schepis | 2014-02-18 |
| 8637958 | Structure and method for forming isolation and buried plate for trench capacitor | Abhishek Dube, Subramanian S. Iyer, Babar A. Khan, Oh-Jung Kwon, Paul C. Parries +4 more | 2014-01-28 |
| 8536650 | Strained ultra-thin SOI transistor formed by replacement gate | Kangguo Cheng | 2013-09-17 |
| 8482009 | Silicon-on-insulator substrate with built-in substrate junction | Thomas W. Dyer, Dominic J. Schepis | 2013-07-09 |
| 8354675 | Enhanced capacitance deep trench capacitor for EDRAM | Oh-Jung Kwon, Chengwen Pei, Geng Wang | 2013-01-15 |
| 8298908 | Structure and method for forming isolation and buried plate for trench capacitor | Abhishek Dube, Subramanian S. Iyer, Babar A. Khan, Oh-Jung Kwon, Paul C. Parries +4 more | 2012-10-30 |
| 8128749 | Fabrication of SOI with gettering layer | Devendra K. Sadana, Dominic J. Schepis | 2012-03-06 |
| 7955940 | Silicon-on-insulator substrate with built-in substrate junction | Thomas W. Dyer, Dominic J. Schepis | 2011-06-07 |
| 7955909 | Strained ultra-thin SOI transistor formed by replacement gate | Kangguo Cheng | 2011-06-07 |
| 7955950 | Semiconductor-on-insulator substrate with a diffusion barrier | Dominic J. Schepis, Jeffrey W. Sleight, Zhibin Ren | 2011-06-07 |
| 7867893 | Method of forming an SOI substrate contact | Haining Yang, Ramachandra Divakaruni, Byeong Y. Kim, Gaku Sudo | 2011-01-11 |
| 7492008 | Control of buried oxide in SIMOX | Stephen Fox, Neena Garg, Kenneth J. Giewont, Siegfried Maurer, Dan Moy +2 more | 2009-02-17 |
| 7348633 | Hybrid crystallographic surface orientation substrate having one or more SOI regions and/or bulk semiconductor regions | Devendra K. Sadana, Dominic J. Schepis, Ghavam G. Shahidi | 2008-03-25 |
| 6967376 | Divot reduction in SIMOX layers | Stephen Fox, Neena Garg, Kenneth J. Giewont, Devendra K. Sadana | 2005-11-22 |
| 6784072 | Control of buried oxide in SIMOX | Stephen Fox, Neena Garg, Kenneth J. Giewont, Siegfried Maurer, Dan Moy +2 more | 2004-08-31 |
| 6531375 | Method of forming a body contact using BOX modification | Kenneth J. Giewont, Eric Adler, Neena Garg, Michael Hargrove, Charles W. Koburger, III +2 more | 2003-03-11 |
| 6495429 | Controlling internal thermal oxidation and eliminating deep divots in SIMOX by chlorine-based annealing | Michael E. Adamcek, Anthony G. Domenicucci, Stephen Fox, Neena Garg, Kenneth J. Giewont +2 more | 2002-12-17 |
| 6447379 | Carrier including a multi-volume diaphragm for polishing a semiconductor wafer and a method therefor | Robert D. Gromko, Stephen C. Schultz, John D. Herb, James Lee | 2002-09-10 |
| 5885147 | Apparatus for conditioning polishing pads | Douglas Kreager | 1999-03-23 |