| 11184221 |
Yield tolerance in a neurosynaptic system |
Rodrigo Alvarez-Icaza Rivera, John V. Arthur, Andrew S. Cassidy, Paul A. Merolla, Dharmendra S. Modha +1 more |
2021-11-23 |
$2,653,000 |
| 11144553 |
Streaming programmable point mapper and compute hardware |
David J. Berg, Andrew S. Cassidy, Michael Vincent DeBole |
2021-10-12 |
$3,967,000 |
| 11049001 |
Event-based neural network with hierarchical addressing for routing event packets between core circuits of the neural network |
Rodrigo Alvarez-Icaza Rivera, John V. Arthur, Andrew S. Cassidy, Paul A. Merolla, Dharmendra S. Modha +1 more |
2021-06-29 |
$5,149,000 |
| 10990872 |
Energy-efficient time-multiplexed neurosynaptic core for implementing neural networks spanning power- and area-efficiency |
Filipp A. Akopyan, Rodrigo Alvarez-Icaza, John V. Arthur, Andrew S. Cassidy, Steven K. Esser +3 more |
2021-04-27 |
$8,613,000 |
| 10984307 |
Peripheral device interconnections for neurosynaptic systems |
Filipp A. Akopyan, Rodrigo Alvarez-Icaza Rivera, John V. Arthur, Andrew S. Cassidy, Paul A. Merolla +2 more |
2021-04-20 |
$5,008,000 |
| 10929747 |
Dual deterministic and stochastic neurosynaptic core circuit |
Rodrigo Alvarez-Icaza, John V. Arthur, Andrew S. Cassidy, Paul A. Merolla, Dharmendra S. Modha +1 more |
2021-02-23 |
$3,028,000 |
| 10832151 |
Implementing stochastic networks using magnetic tunnel junctions |
Dharmendra S. Modha |
2020-11-10 |
$848,000 |
| 10785745 |
Scaling multi-core neurosynaptic networks across chip boundaries |
Rodrigo Alvarez Icaza Rivera, John V. Arthur, Andrew S. Cassidy, Paul A. Merolla, Dharmendra S. Modha +1 more |
2020-09-22 |
$3,040,000 |
| 10769519 |
Converting digital numeric data to spike event data |
Rodrigo Alvarez-Icaza Rivera, John V. Arthur, Andrew S. Cassidy, Steven K. Esser, Myron D. Flickner +4 more |
2020-09-08 |
$3,136,000 |
| 10755165 |
Converting spike event data to digital numeric data |
Rodrigo Alvarez-Icaza Rivera, John V. Arthur, Andrew S. Cassidy, Steven K. Esser, Myron D. Flickner +4 more |
2020-08-25 |
$2,454,000 |
| 10740282 |
Interconnect circuits at three-dimensional (3-D) bonding interfaces of a processor array |
Rodrigo Alvarez-Icaza Rivera, John V. Arthur, John E. Barth, Jr., Andrew S. Cassidy, Subramanian S. Iyer +3 more |
2020-08-11 |
$2,122,000 |
| 10678741 |
Coupling parallel event-driven computation with serial computation |
Dharmendra S. Modha, Norman J. Pass |
2020-06-09 |
$2,264,000 |
| 10650301 |
Utilizing a distributed and parallel set of neurosynaptic core circuits for neuronal computation and non-neuronal computation |
Rodrigo Alvarez-Icaza Rivera, Rathinakumar Appuswamy, John V. Arthur, Andrew S. Cassidy, Paul A. Merolla +2 more |
2020-05-12 |
$2,725,000 |
| 10454759 |
Yield tolerance in a neurosynaptic system |
Rodrigo Alvarez-Icaza Rivera, John V. Arthur, Andrew S. Cassidy, Paul A. Merolla, Dharmendra S. Modha +1 more |
2019-10-22 |
$3,154,000 |
| 10410109 |
Peripheral device interconnections for neurosynaptic systems |
Filipp A. Akopyan, Rodrigo Alvarez-Icaza Rivera, John V. Arthur, Andrew S. Cassidy, Paul A. Merolla +2 more |
2019-09-10 |
$4,978,000 |
| 10102474 |
Event-based neural network with hierarchical addressing for routing event packets between core circuits of the neural network |
Rodrigo Alvarez-Icaza Rivera, John V. Arthur, Andrew S. Cassidy, Paul A. Merolla, Dharmendra S. Modha +1 more |
2018-10-16 |
$2,674,000 |
| 9992057 |
Yield tolerance in a neurosynaptic system |
Rodrigo Alvarez-Icaza Rivera, John V. Arthur, Andrew S. Cassidy, Paul A. Merolla, Dharmendra S. Modha +1 more |
2018-06-05 |
$4,786,000 |
| 9984324 |
Dual deterministic and stochastic neurosynaptic core circuit |
Rodrigo Alvarez-Icaza, John V. Arthur, Andrew S. Cassidy, Paul A. Merolla, Dharmendra S. Modha +1 more |
2018-05-29 |
$2,015,000 |
| 9940302 |
Interconnect circuits at three dimensional (3-D) bonding interfaces of a processor array |
Rodrigo Alvarez-Icaza Rivera, John V. Arthur, John E. Barth, Jr., Andrew S. Cassidy, Subramanian S. Iyer +3 more |
2018-04-10 |
$2,135,000 |
| 9924490 |
Scaling multi-core neurosynaptic networks across chip boundaries |
Rodrigo Alvarez Icaza Rivera, John V. Arthur, Andrew S. Cassidy, Paul A. Merolla, Dharmendra S. Modha +1 more |
2018-03-20 |
$2,525,000 |
| 9886662 |
Converting spike event data to digital numeric data |
Rodrigo Alvarez-Icaza Rivera, John V. Arthur, Andrew S. Cassidy, Steven K. Esser, Myron D. Flickner +4 more |
2018-02-06 |
$2,625,000 |
| 9881252 |
Converting digital numeric data to spike event data |
Rodrigo Alvarez-Icaza Rivera, John V. Arthur, Andrew S. Cassidy, Steven K. Esser, Myron D. Flickner +4 more |
2018-01-30 |
$2,622,000 |
| 9852006 |
Consolidating multiple neurosynaptic core circuits into one reconfigurable memory block maintaining neuronal information for the core circuits |
Filipp A. Akopyan, Rodrigo Alvarez-Icaza Rivera, John V. Arthur, Andrew S. Cassidy, Paul A. Merolla +2 more |
2017-12-26 |
$2,704,000 |
| 9797946 |
Initializing and testing integrated circuits with selectable scan chains with exclusive-OR outputs |
Rodrigo Alvarez-Icaza Rivera, John V. Arthur, Andrew S. Cassidy, Paul A. Merolla, Dharmendra S. Modha +1 more |
2017-10-24 |
$3,030,000 |
| 9792251 |
Array of processor core circuits with reversible tiers |
Rodrigo Alvarez-Icaza Rivera, John V. Arthur, John E. Barth, Jr., Andrew S. Cassidy, Subramanian S. Iyer +3 more |
2017-10-17 |
$4,096,000 |
