Issued Patents All Time
Showing 25 most recent of 39 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12406186 | Conflict-free, stall-free, broadcast network on chip | Andrew S. Cassidy, John V. Arthur, Jun Sawada, Dharmendra S. Modha, Michael Vincent DeBole +2 more | 2025-09-02 |
| 12400112 | Efficient method for VLSI implementation of useful neural network activation functions | Jun Sawada, Myron D. Flickner, Andrew S. Cassidy, John V. Arthur, Pallab Datta +6 more | 2025-08-26 |
| 12387082 | Scheduler for mapping neural networks onto an array of neural cores in an inference processing unit | Pallab Datta, Andrew S. Cassidy, Myron D. Flickner, Hartmut Penner, Jun Sawada +5 more | 2025-08-12 |
| 12182687 | Data representation for dynamic precision in neural network cores | John V. Arthur, Andrew S. Cassidy, Myron D. Flickner, Pallab Datta, Hartmut Penner +5 more | 2024-12-31 |
| 12165050 | Networks for distributing parameters and data to neural network compute cores | John V. Arthur, Brian Taba, Andrew S. Cassidy, Pallab Datta, Steven K. Esser +5 more | 2024-12-10 |
| 12067472 | Defect resistant designs for location-sensitive neural network processor arrays | John V. Arthur, Andrew S. Cassidy, Pallab Datta, Steven K. Esser, Myron D. Flickner +5 more | 2024-08-20 |
| 12056598 | Runtime reconfigurable neural network processor core | Andrew S. Cassidy, John V. Arthur, Pallab Datta, Steven K. Esser, Myron D. Flickner +5 more | 2024-08-06 |
| 11847553 | Parallel computational architecture with reconfigurable core-level and vector-level parallelism | Andrew S. Cassidy, Myron D. Flickner, Pallab Datta, Hartmut Penner, Jun Sawada +5 more | 2023-12-19 |
| 11823054 | Learned step size quantization | Steve Esser, Jeffrey L. McKinstry, Deepika Bablani, Dharmendra S. Modha | 2023-11-21 |
| 11663461 | Instruction distribution in an array of neural network cores | Hartmut Penner, Dharmendra S. Modha, John V. Arthur, Andrew S. Cassidy, Pallab Datta +5 more | 2023-05-30 |
| 11636317 | Long-short term memory (LSTM) cells on spiking neuromorphic hardware | Michael Beyeler, Pallab Datta, Myron D. Flickner, Dharmendra S. Modha | 2023-04-25 |
| 11537859 | Flexible precision neural inference processing unit | Andrew S. Cassidy, John V. Arthur, Pallab Datta, Steve Esser, Myron D. Flickner +4 more | 2022-12-27 |
| 11501140 | Runtime reconfigurable neural network processor core | Andrew S. Cassidy, John V. Arthur, Pallab Datta, Steven K. Esser, Myron D. Flickner +5 more | 2022-11-15 |
| 11270196 | Multi-mode low-precision inner-product computation circuits for massively parallel neural inference engine | Jun Sawada, Filipp A. Akopyan, John V. Arthur, Andrew S. Cassidy, Pallab Datta +5 more | 2022-03-08 |
| 11263011 | Compound instruction set architecture for a neural inference chip | Andrew S. Cassidy, John V. Arthur, Pallab Datta, Michael Vincent DeBole, Steven K. Esser +5 more | 2022-03-01 |
| 11238347 | Data distribution in an array of neural network cores | Brian Taba, Andrew S. Cassidy, Myron D. Flickner, Pallab Datta, Hartmut Penner +5 more | 2022-02-01 |
| 11138495 | Classifying features using a neurosynaptic system | Steven K. Esser, Dharmendra S. Modha | 2021-10-05 |
| 11010662 | Massively parallel neural inference computing elements | John V. Arthur, Andrew S. Cassidy, Pallab Datta, Steven K. Esser, Myron D. Flickner +5 more | 2021-05-18 |
| 10846567 | Scene understanding using a neurosynaptic system | Alexander Andreopoulos, Pallab Datta, Steven K. Esser, Dharmendra S. Modha | 2020-11-24 |
| 10832121 | Transform for a neurosynaptic core circuit | Myron D. Flickner, Dharmendra S. Modha | 2020-11-10 |
| 10832125 | Implementing a neural network algorithm on a neurosynaptic substrate based on metadata associated with the neural network algorithm | Arnon Amir, Pallab Datta, Myron D. Flickner, Paul A. Merolla, Dharmendra S. Modha +1 more | 2020-11-10 |
| 10755166 | Transform architecture for multiple neurosynaptic core circuits | Myron D. Flickner, Dharmendra S. Modha | 2020-08-25 |
| 10650301 | Utilizing a distributed and parallel set of neurosynaptic core circuits for neuronal computation and non-neuronal computation | Rodrigo Alvarez-Icaza Rivera, John V. Arthur, Andrew S. Cassidy, Bryan L. Jackson, Paul A. Merolla +2 more | 2020-05-12 |
| 10621489 | Massively parallel neural inference computing elements | John V. Arthur, Andrew S. Cassidy, Pallab Datta, Steven K. Esser, Myron D. Flickner +5 more | 2020-04-14 |
| 10558892 | Scene understanding using a neurosynaptic system | Alexander Andreopoulos, Pallab Datta, Steven K. Esser, Dharmendra S. Modha | 2020-02-11 |