SI

Subramanian S. Iyer

IBM: 100 patents #566 of 70,183Top 1%
University of California: 7 patents #1,047 of 18,278Top 6%
Globalfoundries: 4 patents #817 of 4,424Top 20%
Infineon Technologies Ag: 3 patents #3,160 of 7,486Top 45%
SL Sibond, L.L.C.: 2 patents #2 of 8Top 25%
Motorola Mobility: 2 patents #590 of 2,091Top 30%
Motorola: 1 patents #6,475 of 12,470Top 55%
GU Globalfoundries U.S.: 1 patents #22 of 211Top 15%
📍 Los Angeles, CA: #22 of 12,377 inventorsTop 1%
🗺 California: #1,614 of 386,348 inventorsTop 1%
Overall (All Time): #10,335 of 4,157,543Top 1%
118
Patents All Time

Issued Patents All Time

Showing 101–118 of 118 patents

Patent #TitleCo-InventorsDate
5937312 Single-etch stop process for the manufacture of silicon-on-insulator wafers Emil Baran, Mark Mastroianni, Robert A. Craven 1999-08-10
5759898 Production of substrate for tensilely strained semiconductor Bruce A. Ek, Philip M. Pitner, Adrian Powell, Manu J. Tejwani 1998-06-02
5667586 Method for forming a single crystal semiconductor on a substrate Bruce A. Ek, Stephen M. Gates, Fernando Guarin, Adrian Powell 1997-09-16
5563428 Layered structure of a substrate, a dielectric layer and a single crystal layer Bruce A. Ek, Stephen M. Gates, Fernando Guarin, Adrian Powell 1996-10-08
5525828 High speed silicon-based lateral junction photodetectors having recessed electrodes and thick oxide to reduce fringing fields Ernest Bassous, Jean-Marc Halbout, Rajiv V. Joshi, Vijay P. Kesan, Michael R. Scheuermann +1 more 1996-06-11
5501787 Immersion scanning system for fabricating porous silicon films Ernest Bassous, Jean-Marc Halbout, Vijay P. Kesan 1996-03-26
5494849 Single-etch stop process for the manufacture of silicon-on-insulator substrates Emil Baran, Mark Mastroianni, Robert A. Craven 1996-02-27
5463254 Formation of 3-dimensional silicon silicide structures Richard D. Thompson, King-Ning Tu 1995-10-31
5461243 Substrate for tensilely strained semiconductor Bruce A. Ek, Philip M. Pitner, Adrian Powell, Manu J. Tejwani 1995-10-24
5458756 Apparatus for producing porous silicon on a substrate Ernest Bassous, Jean-Marc Halbout, Vijay P. Kesan 1995-10-17
5310451 Method of forming an ultra-uniform silicon-on-insulator layer Manu J. Tejwani 1994-05-10
5268324 Modified silicon CMOS process having selectively deposited Si/SiGe FETS John M. Aitken, Vijay P. Kesan, Seshadri Subbanna, Manu J. Tejwani 1993-12-07
5264387 Method of forming uniformly thin, isolated silicon mesas on an insulating substrate Klaus D. Beyer, Mark A. Jaso, Scott R. Stiffler, James D. Warnock 1993-11-23
5135887 Boron source for silicon molecular beam epitaxy Sylvain Delage, Bruce A. Ek 1992-08-04
4997246 Silicon-based rib waveguide optical modulator Paul May 1991-03-05
4738624 Bipolar transistor structure with self-aligned device and isolation and fabrication process therefor Johannes M. C. Stork 1988-04-19
4638347 Gate electrode sidewall isolation spacer for field effect transistors 1987-01-20
4617087 Method for differential selective deposition of metal for fabricating metal contacts in integrated semiconductor circuits Rajiv V. Joshi 1986-10-14