Issued Patents All Time
Showing 51–68 of 68 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9859224 | Registration mark formation during sidewall image transfer process | David J. Conklin, Allen H. Gabor, Sivananda K. Kanakasabapathy, Byeong Y. Kim, Fee Li Lie | 2018-01-02 |
| 9842737 | Self-aligned quadruple patterning process | Matthew E. Colburn, Sivananda K. Kanakasabapathy, Fee Li Lie | 2017-12-12 |
| 9812324 | Methods to control fin tip placement | Lei Zhuang, Lars Liebmann, Fee Li Lie, Mahender Kumar, Shreesh Narasimha +3 more | 2017-11-07 |
| 9805992 | Strained finFET device fabrication | Bruce B. Doris, Hong He, Sivananda K. Kanakasabapathy, Gauri Karve, Fee Li Lie | 2017-10-31 |
| 9805991 | Strained finFET device fabrication | Bruce B. Doris, Hong He, Sivananda K. Kanakasabapathy, Gauri Karve, Fee Li Lie | 2017-10-31 |
| 9741856 | Stress retention in fins of fin field-effect transistors | Sivananda K. Kanakasabapathy, Gauri Karve, Juntao Li, Fee Li Lie, John R. Sporre | 2017-08-22 |
| 9721848 | Cutting fins and gates in CMOS devices | Huiming Bu, Kangguo Cheng, Andrew M. Greene, Dechao Guo, Sivananda K. Kanakasabapathy +6 more | 2017-08-01 |
| 9673199 | Gate cutting for a vertical transistor device | Brent A. Anderson, Sivananda K. Kanakasabapathy, John R. Sporre, Junli Wang | 2017-06-06 |
| 9589958 | Pitch scalable active area patterning structure and process for multi-channel finFET technologies | Sivananda K. Kanakasabapathy, Fee Li Lie, Eric R. Miller | 2017-03-07 |
| 9502411 | Strained finFET device fabrication | Bruce B. Doris, Hong He, Sivananda K. Kanakasabapathy, Gauri Karve, Fee Li Lie | 2016-11-22 |
| 9472506 | Registration mark formation during sidewall image transfer process | David J. Conklin, Allen H. Gabor, Sivananda K. Kanakasabapathy, Byeong Y. Kim, Fee Li Lie | 2016-10-18 |
| 9305845 | Self-aligned quadruple patterning process | Matthew E. Colburn, Sivananda K. Kanakasabapathy, Fee Li Lie | 2016-04-05 |
| 9293375 | Selectively grown self-aligned fins for deep isolation integration | Kevin S. Petrarca, Theodorus E. Standaert | 2016-03-22 |
| 9252022 | Patterning assist feature to mitigate reactive ion etch microloading effect | Daniel James Dechene, Geng Han, Scott M. Mansfield, Yunpeng Yin | 2016-02-02 |
| 9209178 | finFET isolation by selective cyclic etch | Sivananda K. Kanakasabapathy, Theodorus E. Standaert, Yunpeng Yin | 2015-12-08 |
| 8822141 | Front side wafer ID processing | Mukta G. Farooq, Robert Hannon, Subramanian S. Iyer, Kevin S. Petrarca | 2014-09-02 |
| 8450120 | SEM repair for sub-optimal features | Kourosh Nafisi, Eric P. Solecky | 2013-05-28 |
| 8211717 | SEM repair for sub-optimal features | Kourosh Nafisi, Eric P. Solecky | 2012-07-03 |