Issued Patents All Time
Showing 851–875 of 1,139 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9917060 | Forming a contact for a semiconductor device | Oleg Gluschenkov, Zuoguang Liu, Shogo Mochizuki, Hiroaki Niimi | 2018-03-13 |
| 9911619 | Fin cut with alternating two color fin hardmask | Hoon Kim, Catherine B. Labelle, Lars Liebmann, Chanro Park, Min Gyu Sung | 2018-03-06 |
| 9911823 | POC process flow for conformal recess fill | Andrew M. Greene, Sanjay C. Mehta, Balasubramanian Pranatharthiharan | 2018-03-06 |
| 9911604 | Sidewall spacer pattern formation method | Lei Sun, Xunyuan Zhang, Yulu Chen | 2018-03-06 |
| 9911657 | Semiconductor device including finFET and fin varactor | Kangguo Cheng, Junli Wang, Tenko Yamashita | 2018-03-06 |
| 9905671 | Forming a gate contact in the active area | Kangguo Cheng, Tenko Yamashita | 2018-02-27 |
| 9899321 | Methods of forming a gate contact for a semiconductor device above the active region | Chanro Park, Min Gyu Sung, Hoon Kim | 2018-02-20 |
| 9899373 | Forming vertical transistors and metal-insulator-metal capacitors on the same chip | Kangguo Cheng, Tenko Yamashita, Chun-Chen Yeh | 2018-02-20 |
| 9892926 | Replacement low-k spacer | Xiuyu Cai, Kangguo Cheng, Ali Khakifirooz | 2018-02-13 |
| 9887133 | Two-dimensional self-aligned super via integration on self-aligned gate contact | Cheng Chi | 2018-02-06 |
| 9887196 | FinFET including tunable fin height and tunable fin width ratio | Xiuyu Cai, Qing Liu, Chun-Chen Yeh | 2018-02-06 |
| 9882024 | Epitaxial and silicide layer formation at top and bottom surfaces of semiconductor fins | Kangguo Cheng, Zuoguang Liu, Tenko Yamashita | 2018-01-30 |
| 9876077 | Methods of forming a protection layer on an isolation region of IC products comprising FinFET devices | Christopher M. Prindle, Min Gyu Sung, Tek Po Rinus Lee | 2018-01-23 |
| 9875905 | FinFET devices having fins with a tapered configuration and methods of fabricating the same | Min Gyu Sung, Catherine B. Labelle | 2018-01-23 |
| 9875940 | Methods for forming transistor devices with different threshold voltages and the resulting devices | Hoon Kim, Min Gyu Sung, Chanro Park | 2018-01-23 |
| 9870952 | Formation of VFET and finFET | Kangguo Cheng, Tenko Yamashita, Chun-Chen Yeh | 2018-01-16 |
| 9865704 | Single and double diffusion breaks on integrated circuit products comprised of FinFET devices | Kwan-Yong Lim, Min Gyu Sung, Ryan Ryoung-Han Kim | 2018-01-09 |
| 9859125 | Block patterning method enabling merged space in SRAM with heterogeneous mandrel | Min Gyu Sung, Chanro Park, Hoon Kim, Kwan-Yong Lim | 2018-01-02 |
| 9859120 | Method of making self-aligned continuity cuts in mandrel and non-mandrel metal lines | Lei Sun, Xunyuan Zhang, Ryan Ryoung-Han Kim | 2018-01-02 |
| 9859423 | Hetero-channel FinFET | Qing Liu, Chun-Chen Yeh, Xiuyu Cai | 2018-01-02 |
| 9853110 | Method of forming a gate contact structure for a semiconductor device | Xunyuan Zhang, Sean Xuan Lin | 2017-12-26 |
| 9847390 | Self-aligned wrap-around contacts for nanosheet devices | Chanro Park, Min Gyu Sung, Hoon Kim | 2017-12-19 |
| 9837277 | Forming a contact for a tall fin transistor | Kangguo Cheng, Tenko Yamashita | 2017-12-05 |
| 9837404 | Methods, apparatus and system for STI recess control for highly scaled finFET devices | Min Gyu Sung, Chanro Park, Hoon Kim, Kwan-Yong Lim | 2017-12-05 |
| 9837402 | Method of concurrently forming source/drain and gate contacts and related device | Cheng Chi | 2017-12-05 |