Issued Patents All Time
Showing 776–800 of 1,139 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10079173 | Methods of forming metallization lines on integrated circuit products and the resulting products | Lars Liebmann, Daniel Chanemougame, Geng Han | 2018-09-18 |
| 10079292 | Fabrication of vertical field effect transistor structure with controlled gate length | Kangguo Cheng, Tenko Yamashita, Chun-Chen Yeh | 2018-09-18 |
| 10074564 | Self-aligned middle of the line (MOL) contacts | Daniel Chanemougame, Lars Liebmann | 2018-09-11 |
| 10069015 | Width adjustment of stacked nanowires | Kangguo Cheng, Xin Miao, Tenko Yamashita | 2018-09-04 |
| 10068804 | Methods, apparatus and system for providing adjustable fin height for a FinFET device | Peng Xu, Chun Wing Yeung | 2018-09-04 |
| 10062762 | Semiconductor devices having low contact resistance and low current leakage | Qing Liu, Xiuyu Cai, Chun-Chen Yeh | 2018-08-28 |
| 10062617 | Method and structure for SRB elastic relaxation | Murat Kerem Akarvardar, Andreas Knorr | 2018-08-28 |
| 10050118 | Semiconductor device configured for avoiding electrical shorting | Ryan Ryoung-Han Kim, Chanro Park, William J. Taylor, Jr., John A. Iacoponi | 2018-08-14 |
| 10050107 | Nanosheet transistors on bulk material | Kangguo Cheng, Tenko Yamashita, Chun-Chen Yeh | 2018-08-14 |
| 10038065 | Method of forming a semiconductor device with a gate contact positioned above the active region | Chanro Park, Min Gyu Sung, Hoon Kim | 2018-07-31 |
| 10037919 | Integrated single-gated vertical field effect transistor (VFET) and independent double-gated VFET | Chun-Chen Yeh, Kangguo Cheng, Tenko Yamashita | 2018-07-31 |
| 10032884 | Unmerged epitaxial process for FinFET devices with aggressive fin pitch scaling | Xiuyu Cai, Kangguo Cheng, Ali Khakifirooz, Tenko Yamashita | 2018-07-24 |
| 10032912 | Semiconductor integrated structure having an epitaxial SiGe layer extending from silicon-containing regions formed between segments of oxide regions | Pierre Morin, Kangguo Cheng, Jody A. Fronheiser, Xiuyu Cai, Juntao Li +3 more | 2018-07-24 |
| 10026824 | Air-gap gate sidewall spacer and method | Daniel Chanemougame, Andre P. Labonte, Lars Liebmann, Nigel G. Cave, Guillaume Bouche | 2018-07-17 |
| 10026655 | Dual liner CMOS integration methods for FinFET devices | Min Gyu Sung, Chanro Park, Hoon Kim | 2018-07-17 |
| 10014370 | Air gap adjacent a bottom source/drain region of vertical transistor device | Chun-Chen Yeh, Kangguo Cheng, Tenko Yamashita | 2018-07-03 |
| 10014297 | Methods of forming integrated circuit structure using extreme ultraviolet photolithography technique and related integrated circuit structure | Lei Sun, Wenhui Wang, Xunyuan Zhang, Jia Zeng, Xuelian Zhu +2 more | 2018-07-03 |
| 10014215 | Method and apparatus for placing a gate contact inside a semiconductor active region having high-k dielectric gate caps | Andre P. Labonte, Xunyuan Zhang | 2018-07-03 |
| 10014209 | Methods, apparatus and system for local isolation formation for finFET devices | Min Gyu Sung, Hoon Kim, Chanro Park, Sukwon Hong | 2018-07-03 |
| 10014389 | Methods of forming IC products comprising a nano-sheet device and a transistor device having first and second replacement gate structures | Chanro Park, Min Gyu Sung, Hoon Kim | 2018-07-03 |
| 10014390 | Inner spacer formation for nanosheet field-effect transistors with tall suspensions | Guillaume Bouche, Julien Frougier | 2018-07-03 |
| 10014379 | Methods of forming semiconductor device with self-aligned contact elements and the resulting device | Xiuyu Cai | 2018-07-03 |
| 10008415 | Gate structure cut after formation of epitaxial active regions | Xiuyu Cai, Kangguo Cheng, Johnathan E. Faltermeier, Ali Khakifirooz, Theodorus E. Standaert | 2018-06-26 |
| 10008577 | Methods of forming an air-gap spacer on a semiconductor device and the resulting device | Min Gyu Sung, Chanro Park, Hoon Kim | 2018-06-26 |
| 10008582 | Spacers for tight gate pitches in field effect transistors | Chun-Chen Yeh | 2018-06-26 |