Issued Patents All Time
Showing 151–175 of 205 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7904273 | In-line depth measurement for thru silicon via | Qizhi Liu, Kimball M. Watson, Zhijian Yang | 2011-03-08 |
| 7904868 | Structures including means for lateral current carrying capability improvement in semiconductor devices | Natalie B. Feilchenfeld, Zhong-Xiang He, Qizhi Liu, BethAnn Rainey, Kimball M. Watson | 2011-03-08 |
| 7893529 | Thermoelectric 3D cooling | Louis L. Hsu, Xiaojin Wei, Huilong Zhu | 2011-02-22 |
| 7890442 | Method and system for autocompletion of multiple fields in electronic forms | Robert C. Weir, Asima Silva | 2011-02-15 |
| 7863960 | Three-dimensional chip-stack synchronization | Anthony R. Bonaccio, Jong-Ru Guo, Louis L. Hsu | 2011-01-04 |
| 7861204 | Structures including integrated circuits for reducing electromigration effect | Anthony K. Stamper, Timothy D. Sullivan | 2010-12-28 |
| 7859113 | Structure including via having refractory metal collar at copper wire and dielectric layer liner-less interface and related method | Daniel C. Edelstein, Takeshi Nogami, Yun-Yu Wang, Chih-Chao Yang | 2010-12-28 |
| 7856332 | Real time system for monitoring the commonality, sensitivity, and repeatability of test probes | Muthukumarasamy Karthikeyan, Louis V. Medina, Yunsheng Song, Tso-Hui Ting | 2010-12-21 |
| 7839163 | Programmable through silicon via | Kai D. Feng, Louis L. Hsu, Zhijian Yang | 2010-11-23 |
| 7827197 | Method for providing a pluggable custom data binding system | Richard Joseph Scheuerle, Jr. | 2010-11-02 |
| 7821330 | Method and apparatus for extending the lifetime of a semiconductor chip | Jong-Ru Guo, Louis L. Hsu, Zhijian Yang | 2010-10-26 |
| 7816945 | 3D chip-stack with fuse-type through silicon via | Kai D. Feng, Louis L. Hsu, Zhijian Yang | 2010-10-19 |
| 7805274 | Structure and methodology for characterizing device self-heating | Paul A. Hyde, Kevin Kolvenbach, Giuseppe La Rosa | 2010-09-28 |
| 7790599 | Metal cap for interconnect structures | Chih-Chao Yang, Yun-Yu Wang | 2010-09-07 |
| 7745282 | Interconnect structure with bi-layer metal cap | Chih-Chao Yang, Kaushik Chanda | 2010-06-29 |
| 7741722 | Through-wafer vias | Paul S. Andry, Edmund J. Sprogis, Kenneth J. Stein, Timothy D. Sullivan, Cornelia K. Tsang +1 more | 2010-06-22 |
| 7732924 | Semiconductor wiring structures including dielectric cap within metal cap layer | Kaushik Chanda, Ronald G. Filippi, Chih-Chao Yang | 2010-06-08 |
| 7723824 | Methodology for recovery of hot carrier induced degradation in bipolar devices | Fernando Guarin, J. Edwin Hostetter, Stewart E. Rauch, III, Zhijian Yang | 2010-05-25 |
| 7710141 | Method and apparatus for dynamic characterization of reliability wearout mechanisms | Giuseppe La Rosa, Kevin Kolvenbach, Stephen D. Wyatt | 2010-05-04 |
| 7701015 | Bipolar and CMOS integration with reduced contact height | Zhong-Xiang He, Bradley A. Orner, Vidhya Ramachandran, Alvin J. Joseph, Stephen A. St. Onge | 2010-04-20 |
| 7683651 | Test structure for electromigration analysis and related method | Kaushik Chanda, Ronald G. Filippi | 2010-03-23 |
| 7675378 | Multiple status e-fuse based non-volatile voltage control oscillator configured for process variation compensation, an associated method and an associated design structure | Kai D. Feng, Kafai Lai, Zhijian Yang | 2010-03-09 |
| 7671444 | Empty vias for electromigration during electronic-fuse re-programming | Wai-Kin Li | 2010-03-02 |
| 7667328 | Integration circuits for reducing electromigration effect | Anthony K. Stamper, Timothy D. Sullivan | 2010-02-23 |
| 7609121 | Multiple status e-fuse based non-volatile voltage control oscillator configured for process variation compensation, an associated method and an associated design structure | Kai D. Feng, Kafai Lai, Zhijian Yang | 2009-10-27 |