MR

Michael Rizzolo

IBM: 193 patents #171 of 70,183Top 1%
TE Tessera: 6 patents #80 of 271Top 30%
AS Adeia Semiconductor Solutions: 2 patents #9 of 57Top 20%
📍 Albany, NY: #2 of 790 inventorsTop 1%
🗺 New York: #145 of 115,490 inventorsTop 1%
Overall (All Time): #3,319 of 4,157,543Top 1%
201
Patents All Time

Issued Patents All Time

Showing 76–100 of 201 patents

Patent #TitleCo-InventorsDate
10784156 Self-aligned airgaps with conductive lines and vias Benjamin D. Briggs, Lawrence A. Clevenger, Bartlet H. DeProspo, Huai Huang, Christopher J. Penny 2020-09-22
10784197 Method and structure to construct cylindrical interconnects to reduce resistance Benjamin D. Briggs, Christopher J. Penny, Huai Huang, Lawrence A. Clevenger, Hosadurga Shobha 2020-09-22
10785590 Binaural audio calibration Benjamin D. Briggs, Lawrence A. Clevenger, Leigh Anne H. Clevenger, Christopher J. Penny, Aldis Sipolins 2020-09-22
10770348 Location-specific laser annealing to improve interconnect microstructure Benjamin D. Briggs, Lawrence A. Clevenger, Bartlet H. DeProspo 2020-09-08
10770511 Structures and methods for embedded magnetic random access memory (MRAM) fabrication Lawrence A. Clevenger, Nicholas Anthony Lanzillo, Theodorus E. Standaert 2020-09-08
10770653 Selective dielectric deposition to prevent gouging in MRAM Christopher J. Penny, Marc A. Bergendahl, Christopher J. Waskiewicz 2020-09-08
10763160 Semiconductor device with selective insulator for improved capacitance Christopher J. Penny, Benjamin D. Briggs, Lawrence A. Clevenger, Huai Huang, Hosadurga Shobha 2020-09-01
10756260 Co-fabrication of magnetic device structures with electrical interconnects having reduced resistance through increased conductor grain size Lawrence A. Clevenger, Liying Jiang, Sebastian Naczas, Chih-Chao Yang 2020-08-25
10752039 Structure of implementing a directed self-assembled security pattern Benjamin D. Briggs, Lawrence A. Clevenger, Bartlet H. DeProspo 2020-08-25
10747850 Medication scheduling and alerts Maryam Ashoori, Benjamin D. Briggs, Lawrence A. Clevenger, Leigh Anne H. Clevenger, Jonathan H. Connell, II +1 more 2020-08-18
10746782 Accelerated wafer testing using non-destructive and localized stress Benjamin D. Briggs, Lawrence A. Clevenger, Nicholas Anthony Lanzillo, Theodorus E. Standaert, James H. Stathis 2020-08-18
10741609 Pre-patterned etch stop for interconnect trench formation overlying embedded MRAM structures Gangadhara Raja Muthinti, Oscar van der Straten, Chih-Chao Yang 2020-08-11
10739397 Accelerated wafer testing using non-destructive and localized stress Benjamin D. Briggs, Lawrence A. Clevenger, Nicholas Anthony Lanzillo, Theodorus E. Standaert, James H. Stathis 2020-08-11
10720567 Prevention of switching of spins in magnetic tunnel junctions by on-chip parasitic magnetic shield Benjamin D. Briggs, Lawrence A. Clevenger, Nicholas Anthony Lanzillo, Theodorus E. Standaert 2020-07-21
10714683 Multilayer hardmask for high performance MRAM devices Daniel C. Edelstein, Theodorus E. Standaert, Kisup Chung, Isabel Cristina Chu, John C. Arnold 2020-07-14
10714681 Embedded magnetic tunnel junction pillar having reduced height and uniform contact area Theodorus E. Standaert, Cornelius Brown Peethala 2020-07-14
10707413 Formation of embedded magnetic random-access memory devices Ashim Dutta, Chih-Chao Yang, John C. Arnold, Jon Slaughter 2020-07-07
10692925 Dielectric fill for memory pillar elements Theodorus E. Standaert, Isabel Cristina Chu, Chih-Chao Yang, Son V. Nguyen 2020-06-23
10680169 Multilayer hardmask for high performance MRAM devices Daniel C. Edelstein, Theodorus E. Standaert, Kisup Chung, Isabel Cristina Chu, John C. Arnold 2020-06-09
10679934 Capacitance reduction in sea of lines BEOL metallization Benjamin D. Briggs, Lawrence A. Clevenger, Huai Huang, Christopher J. Penny, Hosadurga Shobha 2020-06-09
10672984 Resistive memory crossbar array compatible with Cu metallization Takashi Ando, Lawrence A. Clevenger, Shyng-Tsong Chen 2020-06-02
10672611 Hardmask stress, grain, and structure engineering for advanced memory applications Ashim Dutta, Oscar van der Straten, Chih-Chao Yang 2020-06-02
10658589 Alignment through topography on intermediate component for memory device patterning Hao Tang, Injo Ok, Theodorus E. Standaert 2020-05-19
10651078 Selective ILD deposition for fully aligned via with airgap Christopher J. Penny, Benjamin D. Briggs, Huai Huang, Lawrence A. Clevenger, Hosadurga Shobha 2020-05-12
10629529 Semiconductor device including a porous dielectric layer, and method of forming the semiconductor device Benjamin D. Briggs, Lawrence A. Clevenger, Bartlet H. DeProspo, Huai Huang, Christopher J. Penny 2020-04-21