Issued Patents All Time
Showing 76–100 of 213 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10497612 | Methods of forming contact structures on integrated circuit products | Ruilong Xie, Balasubramanian S. Pranatharthi Haran, Veeraraghavan S. Basker | 2019-12-03 |
| 10497798 | Vertical field effect transistor with self-aligned contacts | Ruilong Xie, Steven Bentley, Puneet Harischandra Suvarna, Chanro Park, Min Gyu Sung +2 more | 2019-12-03 |
| 10490641 | Methods of forming a gate contact structure for a transistor | Ruilong Xie, Hao Tang, Cheng Chi, Daniel Chanemougame, Mark V. Raymond | 2019-11-26 |
| 10490455 | Gate contact structures and cross-coupled contact structures for transistor devices | Ruilong Xie, Youngtag Woo, Daniel Chanemougame, Bipul C. Paul, Heimanu Niebojewski +3 more | 2019-11-26 |
| 10483363 | Methods of forming a gate contact structure above an active region of a transistor | Ruilong Xie, Hao Tang, Cheng Chi, Daniel Chanemougame, Mark V. Raymond | 2019-11-19 |
| 10475692 | Self aligned buried power rail | Nicholas V. LiCausi, Guillaume Bouche | 2019-11-12 |
| 10468300 | Contacting source and drain of a transistor device | Ruilong Xie, Andre P. Labonte, Daniel Chanemougame, Chanro Park, Nigel G. Cave +1 more | 2019-11-05 |
| 10446653 | Transistor-based semiconductor device with air-gap spacers and gate contact over active area | Ruilong Xie, Min Gyu Sung, Chanro Park, Hoon Kim | 2019-10-15 |
| 10418484 | Vertical field effect transistors incorporating U-shaped semiconductor bodies and methods | Ruilong Xie, Edward J. Nowak, Julien Frougier, Jia Zeng | 2019-09-17 |
| 10411010 | Tall single-fin FIN-type field effect transistor structures and methods | Ruilong Xie, Andreas Knorr, Murat Kerem Akarvardar, Nigel G. Cave | 2019-09-10 |
| 10388652 | Intergrated circuit structure including single diffusion break abutting end isolation region, and methods of forming same | Yongiun Shi, Lei Sun, Laertis Economikos, Ruilong Xie, Chanro Park +4 more | 2019-08-20 |
| 10374040 | Method to form low resistance contact | Daniel Chanemougame, Ruilong Xie | 2019-08-06 |
| 10332803 | Hybrid gate-all-around (GAA) field effect transistor (FET) structure and method of forming | Ruilong Xie, Edward J. Nowak, Bipul C. Paul, Steven R. Soss, Julien Frougier +1 more | 2019-06-25 |
| 10332977 | Gate tie-down enablement with inner spacer | Su Chen Fan, Andre P. Labonte, Sanjay C. Mehta | 2019-06-25 |
| 10312154 | Method of forming vertical FinFET device having self-aligned contacts | Ruilong Xie, Steven Bentley, Puneet Harischandra Suvarna, Chanro Park, Min Gyu Sung +2 more | 2019-06-04 |
| 10304832 | Integrated circuit structure incorporating stacked field effect transistors and method | Daniel Chanemougame, Ruilong Xie | 2019-05-28 |
| 10304833 | Method of forming complementary nano-sheet/wire transistor devices with same depth contacts | Puneet Harischandra Suvarna, Bipul C. Paul, Ruilong Xie, Bartlomiej Jan Pawlak, Daniel Chanemougame +2 more | 2019-05-28 |
| 10290549 | Integrated circuit structure, gate all-around integrated circuit structure and methods of forming same | Ruilong Xie, Julien Frougier, Min Gyu Sung, Edward J. Nowak, Nigel G. Cave +2 more | 2019-05-14 |
| 10290544 | Methods of forming conductive contact structures to semiconductor devices and the resulting structures | Ruilong Xie, Daniel Chanemougame, Chanro Park | 2019-05-14 |
| 10283621 | Method of forming vertical field effect transistors with self-aligned gates and gate extensions and the resulting structure | Ruilong Xie, Hui Zang, Steven Bentley | 2019-05-07 |
| 10283408 | Middle of the line (MOL) contacts with two-dimensional self-alignment | Ruilong Xie, Chanro Park, Andre P. Labonte | 2019-05-07 |
| 10269812 | Forming contacts for VFETs | Ruilong Xie, Daniel Chanemougame, Chanro Park, John H. Zhang, Steven Bentley +1 more | 2019-04-23 |
| 10263122 | Methods, apparatus, and manufacturing system for self-aligned patterning of contacts in a vertical field effect transistor | Hui Zang, Ruilong Xie, Tek Po Rinus Lee | 2019-04-16 |
| 10249728 | Air-gap gate sidewall spacer and method | Daniel Chanemougame, Andre P. Labonte, Ruilong Xie, Nigel G. Cave, Guillaume Bouche | 2019-04-02 |
| 10249535 | Forming TS cut for zero or negative TS extension and resulting device | Ruilong Xie, Daniel Chanemougame, Nigel G. Cave | 2019-04-02 |