Issued Patents All Time
Showing 926–950 of 2,819 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10424482 | Methods and structures for forming a tight pitch structure | Peng Xu, Choonghyun Lee, Juntao Li | 2019-09-24 |
| 10424663 | Super long channel device within VFET architecture | Marc A. Bergendahl, Gauri Karve, Fee Li Lie, Eric R. Miller, John R. Sporre +1 more | 2019-09-24 |
| 10424639 | Nanosheet transistor with high-mobility channel | Xin Miao, Wenyu Xu, Chen Zhang | 2019-09-24 |
| 10422746 | Nanoscale surface with nanoscale features formed using diffusion at a liner-semiconductor interface | Juntao Li, Qing Cao | 2019-09-24 |
| 10418463 | Silicon germanium alloy fins with reduced defects | Hong He, Juntao Li | 2019-09-17 |
| 10418277 | Air gap spacer formation for nano-scale semiconductor devices | Thomas J. Haigh, Jr., Juntao Li, Eric G. Liniger, Sanjay C. Mehta, Son V. Nguyen +2 more | 2019-09-17 |
| 10418280 | Fabrication of self-aligned gate contacts and source/drain contacts directly above gate electrodes and source/drains | Veeraraghavan S. Basker, Theodorus E. Standaert, Junli Wang | 2019-09-17 |
| 10411128 | Strained fin channel devices | Junli Wang, Lawrence A. Clevenger, Carl Radens, John H. Zhang | 2019-09-10 |
| 10411114 | Air gap spacer with wrap-around etch stop layer under gate spacer | Chen Zhang, Xin Miao, Wenyu Xu, Peng Xu | 2019-09-10 |
| 10410927 | Method and structure for forming transistors with high aspect ratio gate without patterning collapse | — | 2019-09-10 |
| 10410928 | Homogeneous densification of fill layers for controlled reveal of vertical fins | Choonghyun Lee, Juntao Li, Heng Wu, Peng Xu | 2019-09-10 |
| 10411094 | Method and structure for forming silicon germanium FinFET | Peng Xu, Juntao Li, Heng Wu | 2019-09-10 |
| 10411106 | Transistor with air spacer and self-aligned contact | Xin Miao, Peng Xu, Chen Zhang | 2019-09-10 |
| 10403716 | Trench contact resistance reduction | Zhenxing Bi, Juntao Li, Peng Xu | 2019-09-03 |
| 10403740 | Gate planarity for FinFET using dummy polish stop | Veeraraghavan S. Basker, Theodorus E. Standaert, Junli Wang | 2019-09-03 |
| 10403772 | Electrical and optical via connections on a same chip | Juntao Li, Chengwen Pei, Geng Wang, Joseph Ervin | 2019-09-03 |
| 10396202 | Method and structure for incorporating strain in nanosheet devices | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2019-08-27 |
| 10396208 | Vertical transistors with improved top source/drain junctions | Muthumanickam Sankarapandian, Ruilong Xie, Tenko Yamashita, Chun-Chen Yeh | 2019-08-27 |
| 10396214 | Method of fabricating electrostatically enhanced fins and stacked nanowire field effect transistors | Bruce B. Doris, Pouya Hashemi, Ali Khakifirooz, Alexander Reznicek | 2019-08-27 |
| 10396181 | Forming stacked nanowire semiconductor device | Marc A. Bergendahl, Fee Li Lie, Eric R. Miller, Jeffrey C. Shearer, John R. Sporre +1 more | 2019-08-27 |
| 10396198 | Vertical transistor pass gate device | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2019-08-27 |
| 10396075 | Very narrow aspect ratio trapping trench structure with smooth trench sidewalls | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2019-08-27 |
| 10396151 | Vertical field effect transistor with reduced gate to source/drain capacitance | Juntao Li, Choonghyun Lee, Peng Xu | 2019-08-27 |
| 10396152 | Fabrication of perfectly symmetric gate-all-around FET on suspended nanowire using interface interaction | Pouya Hashemi, Ali Khakifirooz, Alexander Reznicek | 2019-08-27 |
| 10396172 | Transistor with air spacer and self-aligned contact | Xin Miao, Peng Xu, Chen Zhang | 2019-08-27 |