KC

Kangguo Cheng

IBM: 2575 patents #1 of 70,183Top 1%
Globalfoundries: 269 patents #3 of 4,424Top 1%
TE Tessera: 34 patents #14 of 271Top 6%
SS Stmicroelectronics Sa: 19 patents #57 of 1,676Top 4%
AS Adeia Semiconductor Solutions: 13 patents #1 of 57Top 2%
ET Elpis Technologies: 12 patents #1 of 121Top 1%
CEA: 6 patents #716 of 7,956Top 9%
GU Globalfoundries U.S.: 5 patents #206 of 665Top 35%
Samsung: 5 patents #22,466 of 75,807Top 30%
RE Renesas Electronics: 4 patents #1,016 of 4,529Top 25%
IB International Business: 1 patents #4 of 119Top 4%
📍 Schenectady, NY: #1 of 1,353 inventorsTop 1%
🗺 New York: #1 of 115,490 inventorsTop 1%
Overall (All Time): #5 of 4,157,543Top 1%
2819
Patents All Time

Issued Patents All Time

Showing 876–900 of 2,819 patents

Patent #TitleCo-InventorsDate
10504794 Self-aligned silicide/germanide formation to reduce external resistance in a vertical field-effect transistor Choonghyun Lee, Juntao Li, Peng Xu 2019-12-10
10504890 High density nanosheet diodes Juntao Li, Geng Wang, Qintao Zhang 2019-12-10
10505019 Vertical field effect transistors with self aligned source/drain junctions Xin Miao, Chen Zhang, Wenyu Xu 2019-12-10
10505048 Self-aligned source/drain contact for vertical field effect transistor Wenyu Xu, Chen Zhang, Xin Miao 2019-12-10
10504793 Hybrid-channel nano-sheet FETs Zhenxing Bi, Peng Xu, Wenyu Xu 2019-12-10
10497796 Vertical transistor with reduced gate length variation Juntao Li, Choonghyun Lee, Peng Xu 2019-12-03
10497629 Self-aligned punch through stopper liner for bulk FinFET Veeraraghavan S. Basker, Theodorus E. Standaert, Junli Wang 2019-12-03
10497799 Dummy dielectric fins for finFETs with silicon and silicon germanium channels Xin Miao, Wenyu Xu, Chen Zhang 2019-12-03
10490546 Forming on-chip metal-insulator-semiconductor capacitor Zhenxing Bi, Peng Xu, Chen Zhang 2019-11-26
10490453 High threshold voltage FET with the same fin height as regular threshold voltage vertical FET Xin Miao, Chen Zhang, Wenyu Xu 2019-11-26
10490447 Airgap formation in BEOL interconnect structure using sidewall image transfer Ekmini Anuja De Silva, Juntao Li, Yi Song, Peng Xu 2019-11-26
10483166 Vertically stacked transistors Tenko Yamahita, Chun Wing Yeung, Chen Zhang 2019-11-19
10483375 Fin cut etch process for vertical transistor devices Wenyu Xu, Chen Zhang, Xin Miao 2019-11-19
10483382 Tunnel transistor Peng Xu, Heng Wu, Zhenxing Bi 2019-11-19
10475923 Method and structure for forming vertical transistors with various gate lengths Shogo Mochizuki, Choonghyun Lee, Juntao Li 2019-11-12
10468524 Vertical field effect transistor with improved reliability Xin Miao, Philip J. Oldiges, Wenyu Xu, Chen Zhang 2019-11-05
10468525 VFET CMOS dual epitaxy integration Ruilong Xie, Tenko Yamashita, Chun-Chen Yeh 2019-11-05
10460944 Fully depleted semiconductor on insulator transistor with enhanced back biasing tunability Shawn P. Fetterolf, Terry Hook 2019-10-29
10461184 Transistor having reduced gate-induced drain-leakage current Choonghyun Lee 2019-10-29
10460982 Formation of semiconductor devices with dual trench isolations Juntao Li, Choonghyun Lee, Peng Xu 2019-10-29
10453940 Vertical field effect transistor with strained channel region extension Shogo Mochizuki, Choonghyun Lee, Juntao Li 2019-10-22
10453959 Fin replacement in a field-effect transistor Pouya Hashemi, Ali Khakifirooz, Alexander Reznicek, Dominic J. Schepis 2019-10-22
10453939 Reduced capacitance in vertical transistors by preventing excessive overlap between the gate and the source/drain Ruilong Xie, Tenko Yamashita, Chun-Chen Yeh 2019-10-22
10454025 Phase change memory with gradual resistance change 2019-10-22
10453934 Vertical transport FET devices having air gap top spacer Veeraraghavan S. Basker, Theodorus E. Standaert, Junli Wang 2019-10-22