KC

Kangguo Cheng

IBM: 2575 patents #1 of 70,183Top 1%
Globalfoundries: 269 patents #3 of 4,424Top 1%
TE Tessera: 34 patents #14 of 271Top 6%
SS Stmicroelectronics Sa: 19 patents #57 of 1,676Top 4%
AS Adeia Semiconductor Solutions: 13 patents #1 of 57Top 2%
ET Elpis Technologies: 12 patents #1 of 121Top 1%
CEA: 6 patents #716 of 7,956Top 9%
GU Globalfoundries U.S.: 5 patents #206 of 665Top 35%
Samsung: 5 patents #22,466 of 75,807Top 30%
RE Renesas Electronics: 4 patents #1,016 of 4,529Top 25%
IB International Business: 1 patents #4 of 119Top 4%
📍 Schenectady, NY: #1 of 1,353 inventorsTop 1%
🗺 New York: #1 of 115,490 inventorsTop 1%
Overall (All Time): #5 of 4,157,543Top 1%
2819
Patents All Time

Issued Patents All Time

Showing 976–1,000 of 2,819 patents

Patent #TitleCo-InventorsDate
10381355 Dense vertical field effect transistor structure Peng Xu, Zhenxing Bi, Juntao Li 2019-08-13
10381262 Fabrication of vertical transport fin field effect transistors with a self-aligned separator and an isolation region with an air gap Zuoguang Liu, Sebastian Naczas, Heng Wu, Peng Xu 2019-08-13
10381267 Field effect device with reduced capacitance and resistance in source/drain contacts at reduced gate pitch Chi-Chun Liu, Peng Xu 2019-08-13
10381273 Vertically stacked multi-channel transistor structure Tenko Yamashita, Chun-Chen Yeh, Ruilong Xie 2019-08-13
10374073 Single electron transistor with wrap-around gate Xin Miao, Wenyu Xu, Chen Zhang 2019-08-06
10374083 Vertical fin field effect transistor with reduced gate length variations Chen Zhang, Xin Miao, Wenyu Xu 2019-08-06
10374064 Fin field effect transistor complementary metal oxide semiconductor with dual strained channels with solid phase doping Ruilong Xie, Tenko Yamashita 2019-08-06
10374089 Tensile strain in NFET channel Peng Xu, Juntao Li, Heng Wu 2019-08-06
10374035 Bulk nanosheet with dielectric isolation Bruce B. Doris, Junli Wang 2019-08-06
10374091 Silicon germanium fin immune to epitaxy defect Juntao Li, Xin Miao 2019-08-06
10373873 Gate cut in replacement metal gate process Chanro Park, Ruilong Xie, Laertis Economikos 2019-08-06
10373905 Integrating metal-insulator-metal capacitors with air gap process flow Veeraraghavan S. Basker, Theodorus E. Standaert, Junli Wang 2019-08-06
10373908 Dielectric thermal conductor for passivating eFuse and metal resistor Qing Cao, Zhengwen Li, Fei Liu 2019-08-06
10367069 Fabrication of vertical field effect transistor structure with controlled gate length Ruilong Xie, Tenko Yamashita, Chun-Chen Yeh 2019-07-30
10367076 Air gap spacer with controlled air gap height Xin Miao, Wenyu Xu, Chen Zhang 2019-07-30
10366930 Self-aligned gate cut isolation Ruilong Xie, Chanro Park, Min Gyu Sung, Guillaume Bouche 2019-07-30
10367077 Wrap around contact using sacrificial mandrel Nicolas Loubet, Adra Carr 2019-07-30
10365379 Colorimetric radiation dosimetry Qing Cao, Zhengwen Li, Fei Liu 2019-07-30
10366881 Porous fin as compliant medium to form dislocation-free heteroepitaxial films Keith E. Fogel, Jeehwan Kim, Devendra K. Sadana 2019-07-30
10361315 Method and apparatus of fabricating source and drain epitaxy for vertical field effect transistor Chun-Chen Yeh, Ruilong Xie, Tenko Yamashita, Cheng Chi, Chen Zhang 2019-07-23
10361301 Fabrication of vertical fin transistor with multiple threshold voltages Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek 2019-07-23
10361303 Vertical transport fin field effect transistors on a substrate with varying effective gate lengths Zhenxing Bi, Juntao Li, Peng Xu 2019-07-23
10361285 Forming vertical transport field effect transistors with uniform bottom spacer thickness Xuefeng Liu, Peng Xu, Yongan Xu 2019-07-23
10361308 Self-aligned gate cut with polysilicon liner oxidation Peng Xu 2019-07-23
10361199 Vertical transistor transmission gate with adjacent NFET and PFET Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek 2019-07-23