EM

Eric R. Miller

IBM: 84 patents #777 of 70,183Top 2%
RTX (Raytheon): 13 patents #802 of 15,912Top 6%
TE Tessera: 4 patents #104 of 271Top 40%
AS Adeia Semiconductor Solutions: 2 patents #9 of 57Top 20%
Lsi Logic: 1 patents #1,146 of 1,957Top 60%
AT Atmel: 1 patents #459 of 762Top 65%
Globalfoundries: 1 patents #2,221 of 4,424Top 55%
📍 Watervliet, NY: #1 of 109 inventorsTop 1%
🗺 New York: #481 of 115,490 inventorsTop 1%
Overall (All Time): #12,612 of 4,157,543Top 1%
107
Patents All Time

Issued Patents All Time

Showing 51–75 of 107 patents

Patent #TitleCo-InventorsDate
10833190 Super long channel device within VFET architecture Marc A. Bergendahl, Kangguo Cheng, Gauri Karve, Fee Li Lie, John R. Sporre +1 more 2020-11-10
10818663 Fabrication of fin field effect transistors for complementary metal oxide semiconductor devices including separate n-type and p-type source/drains using a single spacer deposition Kangguo Cheng, Fee Li Lie, Sean Teehan 2020-10-27
10790393 Utilizing multilayer gate spacer to reduce erosion of semiconductor Fin during spacer patterning Andrew M. Greene, Hong He, Sivananda K. Kanakasabapathy, Gauri Karve, Pietro Montanini 2020-09-29
10741452 Controlling fin hardmask cut profile using a sacrificial epitaxial structure Stuart A. Sieg, Yann Mignot, Indira Seshadri, Christopher J. Waskiewicz 2020-08-11
10692776 Formation of VTFET fin and vertical fin profile Marc A. Bergendahl, Kangguo Cheng, Yann Mignot 2020-06-23
10672668 Dual width finned semiconductor structure Yi Song, Jay William Strane, Fee Li Lie, Richard A. Conti 2020-06-02
10615269 Nanosheet channel-to-source and drain isolation Marc A. Bergendahl, Kangguo Cheng, Fee Li Lie, John R. Sporre, Sean Teehan 2020-04-07
10607991 Air gap spacer for metal gates Marc A. Bergendahl, Kangguo Cheng, Fee Li Lie, John R. Sporre, Sean Teehan 2020-03-31
10573745 Super long channel device within VFET architecture Marc A. Bergendahl, Kangguo Cheng, Gauri Karve, Fee Li Lie, John R. Sporre +1 more 2020-02-25
10553581 Air gap spacer for metal gates Marc A. Bergendahl, Kangguo Cheng, Fee Li Lie, John R. Sporre, Sean Teehan 2020-02-04
10535529 Semiconductor fin length variability control Praveen Joseph, Ekmini Anuja De Silva, Stuart A. Sieg 2020-01-14
10515837 Method of wafer bonding of dissimilar thickness die Sean P. Kilcoyne 2019-12-24
10504777 Method of manufacturing wafer level low melting temperature interconnections Sean P. Kilcoyne, George Grama 2019-12-10
10446452 Method and structure for enabling controlled spacer RIE Kangguo Cheng, Ryan O. Jung, Fee Li Lie, Jeffrey C. Shearer, John R. Sporre +1 more 2019-10-15
10438972 Sub-fin removal for SOI like isolation with uniform active fin height Marc A. Bergendahl, Kangguo Cheng, Gauri Karve, Fee Li Lie, John R. Sporre +1 more 2019-10-08
10424663 Super long channel device within VFET architecture Marc A. Bergendahl, Kangguo Cheng, Gauri Karve, Fee Li Lie, John R. Sporre +1 more 2019-09-24
10396181 Forming stacked nanowire semiconductor device Marc A. Bergendahl, Kangguo Cheng, Fee Li Lie, Jeffrey C. Shearer, John R. Sporre +1 more 2019-08-27
10381437 Semiconductor device and method of forming the semiconductor device Marc A. Bergendahl, Gauri Karve, Fee Li Lie, Robert R. Robison, John R. Sporre +1 more 2019-08-13
10361129 Self-aligned double patterning formed fincut Stuart A. Sieg, Yann Mignot, Christopher J. Waskiewicz, Hemanth Jagannathan, Indira Seshadri 2019-07-23
10355109 Spacer formation on semiconductor device Thamarai S. Devarajan, Sanjay C. Mehta, Soon-Cheon Seo 2019-07-16
10304689 Margin for fin cut using self-aligned triple patterning Gauri Karve, Fee Li Lie, Stuart A. Sieg, John R. Sporre, Sean Teehan 2019-05-28
10269931 Vertical transport field effect transistor with precise gate length definition Marc A. Bergendahl, Kangguo Cheng, Fee Li Lie, John R. Sporre, Sean Teehan 2019-04-23
10256326 Forming stacked nanowire semiconductor device Marc A. Bergendahl, Kangguo Cheng, Fee Li Lie, Jeffrey C. Shearer, John R. Sporre +1 more 2019-04-09
10256239 Spacer formation preventing gate bending Balasubramanian Pranatharthiharan, Soon-Cheon Seo, John R. Sporre 2019-04-09
10249762 Vertically aligned nanowire channels with source/drain interconnects for nanosheet transistors Marc A. Bergendahl, Kangguo Cheng, John R. Sporre, Sean Teehan 2019-04-02