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Stacked semiconductor devices having dissimilar-sized dies |
Luke England |
2020-10-27 |
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Architecture and implementation of cortical system, and fabricating an architecture using 3D wafer scale integration |
Troy L. Graves-Abe, Subramanian S. Iyer, Toshiaki Kirihata, Arvind Kumar, Winfried W. Wilcke |
2020-04-07 |
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Architecture and implementation of cortical system, and fabricating an architecture using 3D wafer scale integration |
Troy L. Graves-Abe, Subramanian S. Iyer, Toshiaki Kirihata, Arvind Kumar, Winfried W. Wilcke |
2019-12-10 |
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Thermally enhanced package to reduce thermal interaction between dies |
Janak G. Patel, Subramanian S. Iyer |
2019-10-29 |
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Architecture and implementation of cortical system, and fabricating an architecture using 3D wafer scale integration |
Troy L. Graves-Abe, Subramanian S. Iyer, Toshiaki Kirihata, Arvind Kumar, Winfried W. Wilcke |
2018-02-06 |
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Thermally enhanced package to reduce thermal interaction between dies |
Janak G. Patel, Subramanian S. Iyer |
2018-01-02 |
| 7405247 |
Conductive adhesive composition |
Krishna G. Sachdev, Kelly Chioujones, Glenn G. Daves, Hilton T. Toy |
2008-07-29 |
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Conductive adhesive rework method |
Krishna G. Sachdev, Kelly Chioujones, Glenn G. Daves, Hilton T. Toy |
2008-07-01 |
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UV-curable solvent free compositions and use thereof in ceramic chip defect repair |
Krishna G. Sachdev, Kelly Chioujones, Brian W. Quinlan |
2008-02-12 |
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Thermal interface adhesive and rework |
Krishna G. Sachdev, Kelly Chioujones, Glenn G. Daves, Hilton T. Toy |
2007-12-25 |
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High performance integrated MLC cooling device for high power density ICS and method for manufacturing |
Raschid J. Bezama, Lester W. Herron, Bruno Michel, Govindarajan Natarajan |
2007-08-14 |
| 6838009 |
Rework method for finishing metallurgy on chip carriers |
Charles L. Arvin, Hsichang Liu, Krystyna W. Semkow |
2005-01-04 |
| 6529021 |
Self-scrub buckling beam probe |
Yuet-Ying Yu, Camille P. Bowne, Scott I. Langenthal, Charles H. Perry, Terence W. Spoor +1 more |
2003-03-04 |
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Polymer and ceramic composite electronic substrates |
Shaji Farooq, Lester W. Herron, James N. Humenik, John U. Knickerbocker, Robert W. Pasco +2 more |
2003-03-04 |
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Method for making interconnect for low temperature chip attachment |
Guy Paul Brouillette, David Danovitch, Peter A. Gruber, Bruce Lee Humphrey, Michael Liehr +2 more |
2002-01-22 |
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Method for building interconnect structures by injection molded solder and structures built |
Guy Paul Brouillette, David Danovitch, Peter A. Gruber, Rajesh Shankerlal Patel, Stephen Roux +2 more |
2000-11-21 |
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Method for building interconnect structures by injection molded solder and structures built |
Guy Paul Brouillette, David Danovitch, Peter A. Gruber, Rajesh Shankerlal Patel, Stephen Roux +2 more |
2000-10-17 |
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Interconnect for low temperature chip attachment |
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2000-10-03 |
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Wafer test and burn-in platform using ceramic tile supports |
James N. Humenik, Mark R. LaForce, Charles H. Perry |
2000-02-01 |
| 5775569 |
Method for building interconnect structures by injection molded solder and structures built |
Guy Paul Brouillette, David Danovitch, Peter A. Gruber, Rajesh Shankerlal Patel, Stephen Roux +2 more |
1998-07-07 |
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Process for forming negative tone images of polyimides using base treatment of crosslinked polyamic ester |
Marie Angelopoulos, Jeffrey W. Labadie, Eric D. Perfecto, Martha I. Sanchez, Sally A. Swanson +1 more |
1994-05-10 |
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Line width control in a radiation sensitive polyimide |
Marie Angelopolus, Eric D. Perfecto, Peter J. Wilkens |
1994-04-05 |
| 5209817 |
Selective plating method for forming integral via and wiring layers |
Umar M. Ahmad, Ananda H. Kumar, Susan J. LaMaire, Keshav Prasad, Sudipta K. Ray +1 more |
1993-05-11 |