BP

Balasubramanian Pranatharthiharan

IBM: 188 patents #183 of 70,183Top 1%
Globalfoundries: 61 patents #32 of 4,424Top 1%
TE Tessera: 7 patents #62 of 271Top 25%
SS Stmicroelectronics Sa: 4 patents #351 of 1,676Top 25%
ET Elpis Technologies: 3 patents #8 of 121Top 7%
Lam Research: 3 patents #812 of 2,128Top 40%
AS Adeia Semiconductor Solutions: 3 patents #3 of 57Top 6%
GU Globalfoundries U.S.: 2 patents #206 of 665Top 35%
Samsung: 1 patents #49,284 of 75,807Top 70%
🗺 California: #473 of 386,348 inventorsTop 1%
Overall (All Time): #2,902 of 4,157,543Top 1%
213
Patents All Time

Issued Patents All Time

Showing 126–150 of 213 patents

Patent #TitleCo-InventorsDate
9887289 Method and structure of improving contact resistance for passive and long channel devices Injo Ok, Soon-Cheon Seo, Charan V. Surisetty 2018-02-06
9887198 Semiconductor devices with sidewall spacers of equal thickness Kangguo Cheng, Soon-Cheon Seo 2018-02-06
9882050 Strained CMOS on strain relaxation buffer substrate Kangguo Cheng, Juntao Li 2018-01-30
9882028 Pitch split patterning for semiconductor devices Kangguo Cheng, Lawrence A. Clevenger, John H. Zhang 2018-01-30
9871099 Nanosheet isolation for bulk CMOS non-planar devices Injo Ok, Soon-Cheon Seo, Charan V. Surisetty 2018-01-16
9853056 Strained CMOS on strain relaxation buffer substrate Kangguo Cheng, Juntao Li 2017-12-26
9852951 Minimizing shorting between FinFET epitaxial regions Kangguo Cheng, Alexander Reznicek, Charan V. Surisetty 2017-12-26
9825044 Method to prevent lateral epitaxial growth in semiconductor devices Hui Zang 2017-11-21
9818873 Forming stressed epitaxial layers between gates separated by different pitches Emre Alptekin, Lars Liebmann, Injo Ok, Ravikumar Ramachandran, Soon-Cheon Seo +2 more 2017-11-14
9812368 Method to prevent lateral epitaxial growth in semiconductor devices Hui Zang 2017-11-07
9806078 FinFET spacer formation on gate sidewalls, between the channel and source/drain regions Ruilong Xie, Christopher M. Prindle, Tenko Yamashita, Pietro Montanini, Soon-Cheon Seo 2017-10-31
9799654 FET trench dipole formation Injo Ok, Soon-Cheon Seo, Charan V. Surisetty 2017-10-24
9793378 Fin field effect transistor device with reduced overlap capacitance and enhanced mechanical stability Nicolas Loubet, Shom Ponoth, Prasanna Khare, Qing Liu 2017-10-17
9768173 Semiconductor structure containing low-resistance source and drain contacts Injo Ok, Charan V. Surisetty 2017-09-19
9741823 Fin cut during replacement gate formation Andrew M. Greene, Sivananda K. Kanakasabapathy, John R. Sporre 2017-08-22
9741715 Structure to prevent lateral epitaxial growth in semiconductor devices Hui Zang 2017-08-22
9721834 HDP fill with reduced void formation and spacer damage Huiming Bu, Andrew M. Greene, Ruilong Xie 2017-08-01
9721848 Cutting fins and gates in CMOS devices Huiming Bu, Kangguo Cheng, Andrew M. Greene, Dechao Guo, Sivananda K. Kanakasabapathy +6 more 2017-08-01
9704753 Minimizing shorting between FinFET epitaxial regions Kangguo Cheng, Alexander Reznicek, Charan V. Surisetty 2017-07-11
9704760 Integrated circuit (IC) with offset gate sidewall contacts and method of manufacture Injo Ok, Soon-Cheon Seo, Charan V. Surisetty 2017-07-11
9698101 Self-aligned local interconnect technology Andrew M. Greene, Injo Ok, Charan V. V. S. Surisetty, Ruilong Xie 2017-07-04
9691765 Fin type field effect transistors with different pitches and substantially uniform fin reveal Zhenxing Bi, Kangguo Cheng, Thamarai S. Devarajan 2017-06-27
9685340 Stable contact on one-sided gate tie-down structure Injo Ok, Soon-Cheon Seo, Charan V. Surisetty 2017-06-20
9685530 Replacement metal gate dielectric cap Damon B. Farmer, Michael A. Guillorn, George S. Tulevski 2017-06-20
9685384 Devices and methods of forming epi for aggressive gate pitch Ruilong Xie, Christopher M. Prindle, Soon-Cheon Seo, Pietro Montanini, Shogo Mochizuki 2017-06-20