Issued Patents 2018
Showing 26–50 of 338 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10141441 | Vertical transistor with back bias and reduced parasitic capacitance | Xin Miao, Peng Xu, Chen Zhang | 2018-11-27 |
| 10141320 | Multiple-bit electrical fuses | Ramachandra Divakaruni | 2018-11-27 |
| 10141338 | Strained CMOS on strain relaxation buffer substrate | Balasubramanian Pranatharthiharan, Juntao Li | 2018-11-27 |
| 10141420 | Transistors with dielectric-isolated source and drain regions | Choonghyun Lee, Juntao Li, Peng Xu | 2018-11-27 |
| 10141230 | Method and structure to enable dual channel Fin critical dimension control | Marc A. Bergendahl, John R. Sporre, Sean Teehan | 2018-11-27 |
| 10141339 | Embedded security circuit formed by directed self-assembly | Chi-Chun Liu | 2018-11-27 |
| 10141402 | FinFET devices | Veeraraghavan S. Basker, Theodorus E. Standaert, Junli Wang | 2018-11-27 |
| 10141403 | Integrating thin and thick gate dielectric nanosheet transistors on same chip | Juntao Li, Geng Wang, Qintao Zhang | 2018-11-27 |
| 10141234 | Flipped vertical field-effect-transistor | Xin Miao, Wenyu Xu, Chen Zhang | 2018-11-27 |
| 10141428 | Fin formation in fin field effect transistors | Bruce B. Doris, Hong He, Ali Khakifirooz, Yunpeng Yin | 2018-11-27 |
| 10134874 | Vertical field effect transistors with bottom source/drain epitaxy | Xin Miao, Wenyu Xu, Chen Zhang | 2018-11-20 |
| 10134866 | Field effect transistor air-gap spacers with an etch-stop layer | Xin Miao, Wenyu Xu, Chen Zhang | 2018-11-20 |
| 10134762 | Embedded security circuit formed by directed self-assembly | Chi-Chun Liu | 2018-11-20 |
| 10134760 | FinFETs with various fin height | Terence B. Hook, Xin Miao, Balasubramanian Pranatharthiharan | 2018-11-20 |
| 10134595 | High aspect ratio gates | Sivananda K. Kanakasabapathy, Peng Xu | 2018-11-20 |
| 10134859 | Transistor with asymmetric spacers | Zhenxing Bi, Heng Wu, Peng Xu | 2018-11-20 |
| 10128235 | Asymmetrical vertical transistor | Zhenxing Bi, Juntao Li, Peng Xu | 2018-11-13 |
| 10128122 | Stacked nanowires | Zhenxing Bi, Juntao Li, Xin Miao | 2018-11-13 |
| 10128238 | Integrated circuit having oxidized gate cut region and method to fabricate same | Andrew M. Greene, Peng Xu | 2018-11-13 |
| 10121879 | Forming odd number of fins by sidewall imaging transfer | Xin Miao | 2018-11-06 |
| 10121789 | Self-aligned source/drain contacts | Praneet Adusumilli, Emre Alptekin, Balasubramanian Pranatharthiharan, Shom Ponoth | 2018-11-06 |
| 10115629 | Air gap spacer formation for nano-scale semiconductor devices | Thomas J. Haigh, Jr., Juntao Li, Eric G. Liniger, Sanjay C. Mehta, Son V. Nguyen +2 more | 2018-10-30 |
| 10115805 | Extremely thin silicon-on-insulator silicon germanium device without edge strain relaxation | Juntao Li, Zuoguang Liu, Xin Miao | 2018-10-30 |
| 10109491 | Vertical FET with selective atomic layer deposition gate | Xin Miao, Wenyu Xu, Chen Zhang | 2018-10-23 |
| 10109709 | P-FET with strained silicon-germanium channel | Ali Khakifirooz, Alexander Reznicek, Ghavam G. Shahidi | 2018-10-23 |