Issued Patents 2018
Showing 1–25 of 43 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10164110 | Finfet including improved epitaxial topology | Veeraraghavan S. Basker, Tenko Yamashita, Chun-Chen Yeh | 2018-12-25 |
| 10158003 | Epitaxial and silicide layer formation at top and bottom surfaces of semiconductor fins | Kangguo Cheng, Ruilong Xie, Tenko Yamashita | 2018-12-18 |
| 10141308 | Low resistance source/drain contacts for complementary metal oxide semiconductor (CMOS) devices | Praneet Adusumilli, Oleg Gluschenkov, Dechao Guo, Rajasekhar Venigalla, Tenko Yamashita | 2018-11-27 |
| 10134864 | Nanowire semiconductor device including lateral-etch barrier region | Veeraraghavan S. Basker, Tenko Yamashita, Chun-Chen Yeh | 2018-11-20 |
| 10128335 | Nanowire semiconductor device including lateral-etch barrier region | Veeraraghavan S. Basker, Tenko Yamashita, Chun-Chen Yeh | 2018-11-13 |
| 10115728 | Laser spike annealing for solid phase epitaxy and low contact resistance in an SRAM with a shared PFET and NFET trench | Gen Tsutsui, Heng Wu, Peng Xu | 2018-10-30 |
| 10115824 | Forming a contact for a semiconductor device | Oleg Gluschenkov, Shogo Mochizuki, Hiroaki Niimi, Ruilong Xie | 2018-10-30 |
| 10115805 | Extremely thin silicon-on-insulator silicon germanium device without edge strain relaxation | Kangguo Cheng, Juntao Li, Xin Miao | 2018-10-30 |
| 10109723 | Punch through stopper in bulk FinFET device | Veeraraghavan S. Basker, Tenko Yamashita, Chun-Chen Yeh | 2018-10-23 |
| 10103251 | Punch through stopper in bulk finFET device | Veeraraghavan S. Basker, Tenko Yamashita, Chun-Chen Yeh | 2018-10-16 |
| 10084070 | Punch through stopper in bulk finFET device | Veeraraghavan S. Basker, Tenko Yamashita, Chun-Chen Yeh | 2018-09-25 |
| 10084094 | Wrapped source/drain contacts with enhanced area | Kangguo Cheng, Heng Wu, Peng Xu | 2018-09-25 |
| 10068805 | Self-aligned spacer for cut-last transistor fabrication | Ruqiang Bao, Dechao Guo | 2018-09-04 |
| 10056378 | Silicon nitride fill for PC gap regions to increase cell density | Dechao Guo, Tenko Yamashita, Chun-Chen Yeh | 2018-08-21 |
| 10056289 | Fabrication of vertical transport fin field effect transistors with a self-aligned separator and an isolation region with an air gap | Kangguo Cheng, Sebastian Naczas, Heng Wu, Peng Xu | 2018-08-21 |
| 10032677 | Method and structure to fabricate closely packed hybrid nanowires at scaled pitch | Veeraraghavan S. Basker, Tenko Yamashita, Chun-Chen Yeh | 2018-07-24 |
| 10032679 | Self-aligned doping in source/drain regions for low contact resistance | Dechao Guo, Gen Tsutsui, Heng Wu | 2018-07-24 |
| 10020381 | Embedded bottom metal contact formed by a self-aligned contact process for vertical transistors | Su Chen Fan, Heng Wu, Tenko Yamashita | 2018-07-10 |
| 10020400 | Airgap spacers | Kangguo Cheng, Chun Wing Yeung | 2018-07-10 |
| 10020378 | Self-aligned spacer for cut-last transistor fabrication | Ruqiang Bao, Dechao Guo | 2018-07-10 |
| 10002921 | Nanowire semiconductor device including lateral-etch barrier region | Veeraraghavan S. Basker, Tenko Yamashita, Chun-Chen Yeh | 2018-06-19 |
| 10002809 | Top contact resistance measurement in vertical FETs | Kangguo Cheng, Xin Miao, Wenyu Xu, Chen Zhang | 2018-06-19 |
| 10002945 | Composite spacer enabling uniform doping in recessed fin devices | Veeraraghavan S. Basker, Tenko Yamashita, Chun-Chen Yeh | 2018-06-19 |
| 9997609 | Implantation formed metal-insulator-semiconductor (MIS) contacts | Chia-Yu Chen, Tenko Yamashita, Chun-Chen Yeh | 2018-06-12 |
| 9997421 | Top contact resistance measurement in vertical FETS | Kangguo Cheng, Xin Miao, Wenyu Xu, Chen Zhang | 2018-06-12 |