Issued Patents 2018
Showing 1–25 of 171 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10164092 | Tapered vertical FET having III-V channel | Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi | 2018-12-25 |
| 10158001 | Heterogeneous source drain region and extension region | Kangguo Cheng, Pouya Hashemi, Ali Khakifirooz | 2018-12-18 |
| 10153157 | P-FET with graded silicon-germanium channel | Kangguo Cheng, Ali Khakifirooz, Darsen D. Lu | 2018-12-11 |
| 10147741 | FinFET with stacked faceted S/D epitaxy for improved contact resistance | Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi | 2018-12-04 |
| 10147602 | Double aspect ratio trapping | Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz | 2018-12-04 |
| 10141405 | Lateral bipolar junction transistor with abrupt junction and compound buried oxide | Kevin K. Chan, Pouya Hashemi, Tak H. Ning | 2018-11-27 |
| 10141309 | Tight pitch inverter using vertical transistors | Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi | 2018-11-27 |
| 10141406 | Tensile strained NFET and compressively strained PFET formed on strain relaxed buffer | Karthik Balakrishnan, Keith E. Fogel, Pouya Hashemi | 2018-11-27 |
| 10134763 | Gate top spacer for finFET | Veeraraghavan S. Basker, Oleg Gluschenkov, Shogo Mochizuki | 2018-11-20 |
| 10134831 | Deformable and flexible capacitor | Karthik Balakrishnan, Stephen W. Bedell, Pouya Hashemi | 2018-11-20 |
| 10134917 | Tight pitch vertical transistor EEPROM | Karthik Balakrishnan, Pouya Hashemi, Tak H. Ning | 2018-11-20 |
| 10128188 | High aspect ratio contact metallization without seams | Praneet Adusumilli, Oscar van der Straten, Chih-Chao Yang | 2018-11-13 |
| 10121703 | Contact structure and extension formation for III-V nFET | Veeraraghavan S. Basker | 2018-11-06 |
| 10115665 | Semiconductor resistor structures embedded in a middle-of-the-line (MOL) dielectric | Praneet Adusumilli, Oscar van der Straten, Chih-Chao Yang | 2018-10-30 |
| 10115724 | Double diffusion break gate structure without vestigial antenna capacitance | Sivananda K. Kanakasabapathy | 2018-10-30 |
| 10115801 | Vertical transistor gated diode | Karthik Balakrishnan | 2018-10-30 |
| 10109737 | Method of forming high-germanium content silicon germanium alloy fins on insulator | Pouya Hashemi, Renee T. Mo, John A. Ott | 2018-10-23 |
| 10109709 | P-FET with strained silicon-germanium channel | Kangguo Cheng, Ali Khakifirooz, Ghavam G. Shahidi | 2018-10-23 |
| 10109740 | Programmable bulk FinFET antifuses | Praneet Adusumilli, Oscar van der Straten | 2018-10-23 |
| 10103065 | Gate metal patterning for tight pitch applications | Shogo Mochizuki, Joshua M. Rubin, Junli Wang | 2018-10-16 |
| 10090307 | Decoupling capacitor on strain relaxation buffer layer | Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi | 2018-10-02 |
| 10090287 | Deep high capacity capacitor for bulk substrates | Praneet Adusumilli, Keith E. Fogel, Oscar van der Straten | 2018-10-02 |
| 10090290 | Stacked electrostatic discharge diode structures | Bahman Hekmatshoartabari, Karthik Balakrishnan, Tak H. Ning | 2018-10-02 |
| 10090384 | Tensile strained nFET and compressively strained pFET formed on strain relaxed buffer | Karthik Balakrishnan, Keith E. Fogel, Pouya Hashemi | 2018-10-02 |
| 10090151 | Structure and method to reduce copper loss during metal cap formation | Praneet Adusumilli, Oscar van der Straten | 2018-10-02 |