Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
KF

Keith E. Fogel — 24 Patents in 2018

IBM: 23 patents #136 of 10,623Top 2%
Globalfoundries: 1 patents #346 of 961Top 40%
Hopewell Junction, NY: #1 of 82 inventorsTop 2%
New York: #63 of 11,825 inventorsTop 1%
Overall (2018): #967 of 503,207Top 1%
24 Patents 2018

Issued Patents 2018

Showing 1–24 of 24 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
10164014 MOSFET with ultra low drain leakage Joel P. de Souza, Jeehwan Kim, Devendra K. Sadana 2018-12-25
10157993 Low resistance contact for semiconductor devices Joel P. de Souza, Jeehwan Kim, Devendra K. Sadana, Brent A. Wacaser 2018-12-18 $3,830,000
10141406 Tensile strained NFET and compressively strained PFET formed on strain relaxed buffer Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek 2018-11-27 $2,773,000
10090384 Tensile strained nFET and compressively strained pFET formed on strain relaxed buffer Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek 2018-10-02 $3,730,000
10090287 Deep high capacity capacitor for bulk substrates Praneet Adusumilli, Alexander Reznicek, Oscar van der Straten 2018-10-02 $3,730,000
10062643 Nickel-silicon fuse for FinFET structures Kangguo Cheng, Pouya Hashemi, Alexander Reznicek 2018-08-28 $3,847,000
10056503 MIS capacitor for finned semiconductor structure Pouya Hashemi, Shogo Mochizuki, Alexander Reznicek 2018-08-21 $2,787,000
10056510 Cone-shaped holes for high efficiency thin film solar cells Augustin J. Hong, Jeehwan Kim, Devendra K. Sadana 2018-08-21 $2,787,000
10056329 Programmable buried antifuse Praneet Adusumilli, Alexander Reznicek, Oscar van der Straten 2018-08-21 $2,787,000
10038057 Junction interlayer dielectric for reducing leakage current in semiconductor devices Joel P. de Souza, Jeehwan Kim, Devendra K. Sadana, Brent A. Wacaser 2018-07-31 $5,084,000
10038050 FinFET resistor and method to fabricate same Praneet Adusumilli, Alexander Reznicek, Oscar van der Straten 2018-07-31 $5,084,000
10032870 Low defect III-V semiconductor template on porous silicon Joel P. de Souza, Alexander Reznicek, Dominic J. Schepis 2018-07-24 $20,009,000
10026618 Method for improving quality of spalled material layers Stephen W. Bedell, Paul A. Lauro, Ning Li, Devendra K. Sadana, Katherine L. Saenger +1 more 2018-07-17 $3,360,000
10020418 Simplified process for vertical LED manufacturing Stephen W. Bedell, Paul A. Lauro, Devendra K. Sadana 2018-07-10 $4,870,000
9997590 FinFET resistor and method to fabricate same Praneet Adusumilli, Alexander Reznicek, Oscar van der Straten 2018-06-12 $1,886,000
9947529 Porous fin as compliant medium to form dislocation-free heteroepitaxial films Kangguo Cheng, Jeehwan Kim, Devendra K. Sadana 2018-04-17 $1,989,000
9935215 Transparent conductive electrode for three dimensional photovoltaic device Augustin J. Hong, Jeehwan Kim, Devendra K. Sadana 2018-04-03 $2,801,000
9929313 Protective capping layer for spalled gallium nitride Stephen W. Bedell, Paul A. Lauro, Devendra K. Sadana 2018-03-27 $2,459,000
9922941 Thin low defect relaxed silicon germanium layers on bulk silicon substrates Praneet Adusumilli, Alexander Reznicek, Oscar van der Straten 2018-03-20 $2,525,000
9918382 Patterned metallization handle layer for controlled spalling Turki bin Saud bin Mohammed Al-Saud, Stephen W. Bedell, Paul A. Lauro, Devendra K. Sadana 2018-03-13 $2,527,000
9905649 Tensile strained nFET and compressively strained pFET formed on strain relaxed buffer Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek 2018-02-27 $3,821,000
9893014 Designable channel FinFET fuse Pouya Hashemi, Shogo Mochizuki, Alexander Reznicek 2018-02-13 $2,196,000
9887265 MOSFET with ultra low drain leakage Joel P. de Souza, Jeehwan Kim, Devendra K. Sadana 2018-02-06 $2,625,000
9876129 Cone-shaped holes for high efficiency thin film solar cells Augustin J. Hong, Jeehwan Kim, Devendra K. Sadana 2018-01-23 $4,886,000