KF

Keith E. Fogel

IBM: 23 patents #136 of 10,623Top 2%
KT King Abdulaziz City For Science And Technology: 2 patents #3 of 59Top 6%
Globalfoundries: 1 patents #346 of 961Top 40%
Overall (2018): #967 of 503,207Top 1%
24
Patents 2018

Issued Patents 2018

Patent #TitleCo-InventorsDate
10164014 MOSFET with ultra low drain leakage Joel P. de Souza, Jeehwan Kim, Devendra K. Sadana 2018-12-25
10157993 Low resistance contact for semiconductor devices Joel P. de Souza, Jeehwan Kim, Devendra K. Sadana, Brent A. Wacaser 2018-12-18
10141406 Tensile strained NFET and compressively strained PFET formed on strain relaxed buffer Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek 2018-11-27
10090384 Tensile strained nFET and compressively strained pFET formed on strain relaxed buffer Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek 2018-10-02
10090287 Deep high capacity capacitor for bulk substrates Praneet Adusumilli, Alexander Reznicek, Oscar van der Straten 2018-10-02
10062643 Nickel-silicon fuse for FinFET structures Kangguo Cheng, Pouya Hashemi, Alexander Reznicek 2018-08-28
10056503 MIS capacitor for finned semiconductor structure Pouya Hashemi, Shogo Mochizuki, Alexander Reznicek 2018-08-21
10056510 Cone-shaped holes for high efficiency thin film solar cells Augustin J. Hong, Jeehwan Kim, Devendra K. Sadana 2018-08-21
10056329 Programmable buried antifuse Praneet Adusumilli, Alexander Reznicek, Oscar van der Straten 2018-08-21
10038057 Junction interlayer dielectric for reducing leakage current in semiconductor devices Joel P. de Souza, Jeehwan Kim, Devendra K. Sadana, Brent A. Wacaser 2018-07-31
10038050 FinFET resistor and method to fabricate same Praneet Adusumilli, Alexander Reznicek, Oscar van der Straten 2018-07-31
10032870 Low defect III-V semiconductor template on porous silicon Joel P. de Souza, Alexander Reznicek, Dominic J. Schepis 2018-07-24
10026618 Method for improving quality of spalled material layers Stephen W. Bedell, Paul A. Lauro, Ning Li, Devendra K. Sadana, Katherine L. Saenger +1 more 2018-07-17
10020418 Simplified process for vertical LED manufacturing Stephen W. Bedell, Paul A. Lauro, Devendra K. Sadana 2018-07-10
9997590 FinFET resistor and method to fabricate same Praneet Adusumilli, Alexander Reznicek, Oscar van der Straten 2018-06-12
9947529 Porous fin as compliant medium to form dislocation-free heteroepitaxial films Kangguo Cheng, Jeehwan Kim, Devendra K. Sadana 2018-04-17
9935215 Transparent conductive electrode for three dimensional photovoltaic device Augustin J. Hong, Jeehwan Kim, Devendra K. Sadana 2018-04-03
9929313 Protective capping layer for spalled gallium nitride Stephen W. Bedell, Paul A. Lauro, Devendra K. Sadana 2018-03-27
9922941 Thin low defect relaxed silicon germanium layers on bulk silicon substrates Praneet Adusumilli, Alexander Reznicek, Oscar van der Straten 2018-03-20
9918382 Patterned metallization handle layer for controlled spalling Turki bin Saud bin Mohammed Al-Saud, Stephen W. Bedell, Paul A. Lauro, Devendra K. Sadana 2018-03-13
9905649 Tensile strained nFET and compressively strained pFET formed on strain relaxed buffer Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek 2018-02-27
9893014 Designable channel FinFET fuse Pouya Hashemi, Shogo Mochizuki, Alexander Reznicek 2018-02-13
9887265 MOSFET with ultra low drain leakage Joel P. de Souza, Jeehwan Kim, Devendra K. Sadana 2018-02-06
9876129 Cone-shaped holes for high efficiency thin film solar cells Augustin J. Hong, Jeehwan Kim, Devendra K. Sadana 2018-01-23