Issued Patents 2018
Showing 26–50 of 171 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10084041 | Method and structure for improving FinFET with epitaxy source/drain | Kangguo Cheng, Ali Khakifirooz, Tenko Yamashita | 2018-09-25 |
| 10084067 | FinFET with epitaxial source and drain regions and dielectric isolated channel region | Kangguo Cheng, Ramachandra Divakaruni, Ali Khakifirooz, Soon-Cheon Seo | 2018-09-25 |
| 10084050 | Semiconductor device with low-K gate cap and self-aligned contact | Kangguo Cheng, Ali Khakifirooz, Charan V. Surisetty | 2018-09-25 |
| 10084064 | Fabrication of strained vertical p-type field effect transistors by bottom condensation | Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi | 2018-09-25 |
| 10083875 | Vertical transistors having different gate lengths | Karthik Balakrishnan, Pouya Hashemi, Tak H. Ning | 2018-09-25 |
| 10083907 | Method and structure for forming on-chip anti-fuse with reduced breakdown voltage | Kangguo Cheng, Pouya Hashemi, Ali Khakifirooz | 2018-09-25 |
| 10084081 | Vertical transistor with enhanced drive current | Kangguo Cheng, Xin Miao | 2018-09-25 |
| 10084090 | Method and structure of stacked FinFET | Kangguo Cheng, Pouya Hashemi, Ali Khakifirooz | 2018-09-25 |
| 10083964 | Double diffusion break gate structure without vestigial antenna capacitance | Sivananda K. Kanakasabapathy | 2018-09-25 |
| 10079303 | Method to form strained nFET and strained pFET nanowires on a same substrate | Kangguo Cheng, Pouya Hashemi, Ali Khakifirooz | 2018-09-18 |
| 10079299 | Self aligned top extension formation for vertical transistors | Oleg Gluschenkov, Sanjay C. Mehta, Shogo Mochizuki | 2018-09-18 |
| 10079181 | P-FET with strained silicon-germanium channel | Kangguo Cheng, Ali Khakifirooz, Ghavam G. Shahidi | 2018-09-18 |
| 10079228 | Tight integrated vertical transistor dual diode structure for electrostatic discharge circuit protector | Karthik Balakrishnan, Bahman Hekmatshoartabari, Jeng-Bang Yau | 2018-09-18 |
| 10079288 | Contact formation on germanium-containing substrates using hydrogenated silicon | Karthik Balakrishnan, Pouya Hashemi, Bahman Hekmatshoartabari | 2018-09-18 |
| 10074720 | Digital alloy vertical lamellae finfet with current flow in alloy layer direction | Karthik Balakrishnan, Stephen W. Bedell, Pouya Hashemi, Bahman Hekmatshoartabari | 2018-09-11 |
| 10074727 | Low resistivity wrap-around contacts | Praneet Adusumilli, Adra Carr, Oscar van der Straten | 2018-09-11 |
| 10069008 | Vertical transistor pass gate device | Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi | 2018-09-04 |
| 10068920 | Silicon germanium fins on insulator formed by lateral recrystallization | Veeraraghavan S. Basker, Shogo Mochizuki, Nicolas L. Breil, Oleg Gluschenkov | 2018-09-04 |
| 10062643 | Nickel-silicon fuse for FinFET structures | Kangguo Cheng, Keith E. Fogel, Pouya Hashemi | 2018-08-28 |
| 10056391 | Vertically stacked FinFET fuse | Praneet Adusumilli, Oscar van der Straten | 2018-08-21 |
| 10056474 | Semiconductor structures having increased channel strain using fin release in gate regions | Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz, Darsen D. Lu, Kern Rim | 2018-08-21 |
| 10056503 | MIS capacitor for finned semiconductor structure | Keith E. Fogel, Pouya Hashemi, Shogo Mochizuki | 2018-08-21 |
| 10056329 | Programmable buried antifuse | Praneet Adusumilli, Keith E. Fogel, Oscar van der Straten | 2018-08-21 |
| 10056379 | Low voltage (power) junction FET with all-around junction gate | Karthik Balakrishnan, Bahman Hekmatshoartabari, Jeng-Bang Yau | 2018-08-21 |
| 10056482 | Implementation of long-channel thick-oxide devices in vertical transistor flow | Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi | 2018-08-21 |