Issued Patents 2018
Showing 1–18 of 18 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10134882 | Method of junction control for lateral bipolar junction transistor | Pouya Hashemi, Kam-Leung Lee, Tak H. Ning | 2018-11-20 |
| 10128343 | III-V MOSFET with self-aligned diffusion barrier | Kevin K. Chan, Cheng-Wei Cheng, Jack O. Chu, Yanning Sun | 2018-11-13 |
| 10115750 | Sensors including complementary lateral bipolar junction transistors | Michael S. Gordon, Tak H. Ning, Kenneth P. Rodbell | 2018-10-30 |
| 10079228 | Tight integrated vertical transistor dual diode structure for electrostatic discharge circuit protector | Karthik Balakrishnan, Bahman Hekmatshoartabari, Alexander Reznicek | 2018-09-18 |
| 10074734 | Germanium lateral bipolar transistor with silicon passivation | Kevin K. Chan, Tak H. Ning | 2018-09-11 |
| 10056379 | Low voltage (power) junction FET with all-around junction gate | Karthik Balakrishnan, Bahman Hekmatshoartabari, Alexander Reznicek | 2018-08-21 |
| 10049742 | Parallel-connected merged-floating-gate nFET-pFET EEPROM cell and array | Tak H. Ning | 2018-08-14 |
| 10043711 | Contact resistance reduction by III-V Ga deficient surface | Takashi Ando, Kevin K. Chan, John Rozen, Yu Zhu | 2018-08-07 |
| 10026752 | Stacked SOI lateral bipolar transistor RF power amplifier and driver | Alberto Valdes Garcia, Tak H. Ning, Jean-Olivier Plouchart, Ghavam G. Shahidi | 2018-07-17 |
| 10026733 | Complementary SOI lateral bipolar transistors with backplate bias | Tak H. Ning | 2018-07-17 |
| 10008281 | One time programmable read-only memory (ROM) in SOI CMOS | Tak H. Ning, Ghavam G. Shahidi | 2018-06-26 |
| 9997619 | Bipolar junction transistors and methods forming same | Karthik Balakrishnan, Bahman Hekmatshoartabari, Alexander Reznicek | 2018-06-12 |
| 9947755 | III-V MOSFET with self-aligned diffusion barrier | Kevin K. Chan, Cheng-Wei Cheng, Jack O. Chu, Yanning Sun | 2018-04-17 |
| 9947677 | High-density EEPROM arrays having parallel-connected common-floating-gate NFET and PFET as memory cell | Kevin K. Chan, Bahman Hekmatshoartabari, Tak H. Ning | 2018-04-17 |
| 9947649 | Large area electrostatic dischage for vertical transistor structures | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2018-04-17 |
| 9929258 | Method of junction control for lateral bipolar junction transistor | Pouya Hashemi, Kam-Leung Lee, Tak H. Ning | 2018-03-27 |
| 9887278 | Semiconductor-on-insulator lateral heterojunction bipolar transistor having epitaxially grown intrinsic base and deposited extrinsic base | Jin Cai, Kevin K. Chan, Christopher P. D'Emic, Tak H. Ning | 2018-02-06 |
| 9887264 | Nanowire field effect transistor (FET) and method for fabricating the same | Jack O. Chu, Szu-Lin Cheng, Isaac Lauer, Kuen-Ting Shiu | 2018-02-06 |