| 10141719 |
Resonant cavity strained group III-V photodetector and LED on silicon substrate and method to fabricate same |
Effendi Leobandung, Ning Li, Devendra K. Sadana, Kuen-Ting Shiu |
2018-11-27 |
| 10135226 |
Resonant cavity strained Group III-V photodetector and LED on silicon substrate and method to fabricate same |
Effendi Leobandung, Ning Li, Devendra K. Sadana, Kuen-Ting Shiu |
2018-11-20 |
| 10128343 |
III-V MOSFET with self-aligned diffusion barrier |
Kevin K. Chan, Jack O. Chu, Yanning Sun, Jeng-Bang Yau |
2018-11-13 |
| 10122153 |
Resonant cavity strained group III-V photodetector and LED on silicon substrate and method to fabricate same |
Effendi Leobandung, Ning Li, Devendra K. Sadana, Kuen-Ting Shiu |
2018-11-06 |
| 10083986 |
CMOS with middle of line processing of III-V material on mandrel |
Sanghoon Lee, Effendi Leobandung, Renee T. Mo |
2018-09-25 |
| 10083987 |
CMOS with middle of line processing of III-V material on mandrel |
Sanghoon Lee, Effendi Leobandung, Renee T. Mo |
2018-09-25 |
| 10043663 |
Enhanced defect reduction for heteroepitaxy by seed shape engineering |
David L. Rath, Devendra K. Sadana, Kuen-Ting Shiu, Brent A. Wacaser |
2018-08-07 |
| 10037989 |
III-V lateral bipolar integration with silicon |
Sanghoon Lee, Effendi Leobandung, Renee T. Mo |
2018-07-31 |
| 10014377 |
III-V field effect transistor on a dielectric layer |
Edward W. Kiewra, Amlan Majumdar, Devendra K. Sadana, Kuen-Ting Shiu, Yanning Sun |
2018-07-03 |
| 9984873 |
Preparation of low defect density of III-V on Si for device fabrication |
Devendra K. Sadana, Kuen-Ting Shiu, Yanning Sun |
2018-05-29 |
| 9966735 |
III-V lasers with integrated silicon photonic circuits |
Frank R. Libsch, Tak H. Ning, Uzma Rana, Kuen-Ting Shiu |
2018-05-08 |
| 9947755 |
III-V MOSFET with self-aligned diffusion barrier |
Kevin K. Chan, Jack O. Chu, Yanning Sun, Jeng-Bang Yau |
2018-04-17 |
| 9947533 |
Selective epitaxy using epitaxy-prevention layers |
Jeehwan Kim, John A. Ott, Devendra K. Sadana |
2018-04-17 |
| 9941363 |
III-V transistor device with self-aligned doped bottom barrier |
Pranita Kerber, Amlan Majumdar, Yanning Sun |
2018-04-10 |
| 9882021 |
Planar III-V field effect transistor (FET) on dielectric layer |
Edward W. Kiewra, Amlan Majumdar, Uzma Rana, Devendra K. Sadana, Kuen-Ting Shiu +1 more |
2018-01-30 |
| 9865469 |
Epitaxial lift-off process with guided etching |
Ning Li, Devendra K. Sadana, Leathen Shi, Kuen-Ting Shiu |
2018-01-09 |
| 9864135 |
Complementary metal oxide semiconductor device with III-V optical interconnect having III-V epitaxially formed material |
Ning Li, Devendra K. Sadana, Kuen-Ting Shiu |
2018-01-09 |
