Issued Patents 2018
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10121789 | Self-aligned source/drain contacts | Praneet Adusumilli, Kangguo Cheng, Balasubramanian Pranatharthiharan, Shom Ponoth | 2018-11-06 |
| 10103226 | Method of fabricating tunnel transistors with abrupt junctions | Reinaldo Vega, Hung H. Tran, Xiaobin Yuan | 2018-10-16 |
| 10083865 | Partial spacer for increasing self aligned contact process margins | Ravikumar Ramachandran, Viraj Y. Sardesai, Reinaldo Vega | 2018-09-25 |
| 9997411 | Formation of metal resistor and e-fuse | Cung D. Tran, Viraj Y. Sardesai, Reinaldo Vega | 2018-06-12 |
| 9985109 | FinFET with reduced parasitic capacitance | Veeraraghavan S. Basker, Sivananda K. Kanakasabapathy | 2018-05-29 |
| 9985104 | Contact first replacement metal gate | Ravikumar Ramachandran, Viraj Y. Sardesai | 2018-05-29 |
| 9929047 | Partial spacer for increasing self aligned contact process margins | Ravikumar Ramachandran, Viraj Y. Sardesai, Reinaldo Vega | 2018-03-27 |
| 9865546 | Contacts to semiconductor substrate and methods of forming same | Nicolas L. Breil, Christian Lavoie, Ahmet S. Ozcan, Kathryn T. Schonenberg | 2018-01-09 |