Issued Patents All Time
Showing 51–75 of 122 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11393746 | Reinforcing package using reinforcing patches | Chia-Kuei Hsu, Ming-Chih Yew, Po-Yao Lin, Feng-Cheng Hsu, Shin-Puu Jeng | 2022-07-19 |
| 11342306 | Multi-chip wafer level packages | Feng-Cheng Hsu, Han-Hsiang Huang, Hsien-Wen Liu, Shin-Puu Jeng, Hsiao-Wen Lee | 2022-05-24 |
| 11342255 | Semiconductor structure and manufacturing method thereof | Feng-Cheng Hsu, Shin-Puu Jeng | 2022-05-24 |
| 11335672 | Semiconductor structure and manufacturing method thereof | Hsiang-Tai Lu, Mill-Jer Wang, Feng-Cheng Hsu, Chao-Hsiang Yang, Shin-Puu Jeng +4 more | 2022-05-17 |
| 11315878 | Photonics integrated circuit package | Feng-Wei Kuo, Chewn-Pu Jou | 2022-04-26 |
| 11295957 | Package structure and method of manufacturing the same | Feng-Cheng Hsu, Shin-Puu Jeng | 2022-04-05 |
| 11296065 | Semiconductor packages and methods of forming same | Shin-Puu Jeng, Techi Wong, Po-Yao Chuang, Meng-Wei Chou | 2022-04-05 |
| 11282759 | Chip package structure having warpage control and method of forming the same | Feng-Cheng Hsu, Shin-Puu Jeng | 2022-03-22 |
| 11270975 | Semiconductor packages including passive devices and methods of forming same | Shin-Puu Jeng, Po-Yao Chuang | 2022-03-08 |
| 11270953 | Structure and formation method of chip package with shielding structure | Po-Yao Chuang, Po-Hao Tsai, Shin-Puu Jeng, Ming-Chih Yew | 2022-03-08 |
| 11264300 | Package structure with lid and method for forming the same | Shin-Puu Jeng, Po-Yao Lin, Feng-Cheng Hsu, Chin-Hua Wang | 2022-03-01 |
| 11251054 | Integrated passive device package and methods of forming same | Feng-Cheng Hsu, Jui-Pin Hung, Shin-Puu Jeng | 2022-02-15 |
| 11251142 | Method of fabricating package structure | Chia-Hsiang Lin, Feng-Cheng Hsu, Shin-Puu Jeng, Arunima Banerjee | 2022-02-15 |
| 11239194 | Chip package structure | Shin-Puu Jeng, Feng-Cheng Hsu | 2022-02-01 |
| 11189596 | Methods of forming multi-chip wafer level packages | Feng-Cheng Hsu, Han-Hsiang Huang, Hsien-Wen Liu, Shin-Puu Jeng, Hsiao-Wen Lee | 2021-11-30 |
| 11107801 | Multi fan-out package structure and method for forming the same | Shin-Puu Jeng, Po-Yao Lin, Feng-Cheng Hsu, Chia-Hsiang Lin | 2021-08-31 |
| 11037861 | Interconnect structure for package-on-package devices | Jui-Pin Hung, Jing-Cheng Lin, Po-Hao Tsai, Yi-Jou Lin, Chiung-Han Yeh +1 more | 2021-06-15 |
| 11023647 | Integrated circuit stack verification method and system for performing the same | Feng-Wei Kuo, Chin-Yuan Huang, Kai-Yun Lin, Ho-Hsiang Chen, Chewn-Pu Jou | 2021-06-01 |
| 11004818 | Package with passive devices and method of forming the same | Der-Chyang Yeh, Li-Hsien Huang | 2021-05-11 |
| 10985100 | Chip package with recessed interposer substrate | Shin-Puu Jeng, Po-Hao Tsai, Po-Yao Chuang, Feng-Cheng Hsu, Techi Wong | 2021-04-20 |
| 10971441 | Package with metal-insulator-metal capacitor and method of manufacturing the same | Der-Chyang Yeh, Chiung-Han Yeh | 2021-04-06 |
| 10867924 | Semiconductor package with redistribution structure and pre-made substrate on opposing sides for dual-side metal routing | Shin-Puu Jeng, Hsien-Wen Liu, Po-Yao Chuang, Feng-Cheng Hsu, Po-Yao Lin | 2020-12-15 |
| 10867925 | Method for forming chip package structure | Shin-Puu Jeng, Feng-Cheng Hsu, Po-Yao Lin | 2020-12-15 |
| 10804244 | Semiconductor package structure and method of manufacturing the same | Shin-Puu Jeng, Feng-Cheng Hsu | 2020-10-13 |
| 10784220 | Plurality of semiconductor devices encapsulated by a molding material attached to a redistribution layer | Shin-Puu Jeng, Feng-Cheng Hsu | 2020-09-22 |