Issued Patents All Time
Showing 26–50 of 122 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11908764 | Semiconductor package including a circuit substrate having a cavity and a floor plate embedded in a dielectric material and a semiconductor die disposed in the cavity | Meng-Liang Lin, Po-Yao Chuang, Te-Chi Wong, Shin-Puu Jeng | 2024-02-20 |
| 11887952 | Semiconductor device encapsulated by molding material attached to redistribution layer | Shin-Puu Jeng, Feng-Cheng Hsu | 2024-01-30 |
| 11862469 | Package structure and method of manufacturing the same | Feng-Cheng Hsu, Shin-Puu Jeng | 2024-01-02 |
| 11855066 | Semiconductor structure and manufacturing method thereof | Hsiang-Tai Lu, Mill-Jer Wang, Feng-Cheng Hsu, Chao-Hsiang Yang, Shin-Puu Jeng +4 more | 2023-12-26 |
| 11848305 | Semiconductor packages including passive devices and methods of forming same | Shin-Puu Jeng, Po-Yao Chuang | 2023-12-19 |
| 11817324 | Info packages including thermal dissipation blocks | Ching-Yi Lin, Yu-Hao Chen, Fong-Yuan Chang, Po-Hsiang Huang, Jyh Chwen Frank Lee | 2023-11-14 |
| 11810830 | Chip package structure with cavity in interposer | Shin-Puu Jeng, Feng-Cheng Hsu | 2023-11-07 |
| 11791301 | Chip package structure | Shin-Puu Jeng, Feng-Cheng Hsu | 2023-10-17 |
| 11756928 | Multi-chip packages | Feng-Cheng Hsu, Han-Hsiang Huang, Hsien-Wen Liu, Shin-Puu Jeng, Hsiao-Wen Lee | 2023-09-12 |
| 11756892 | Method for forming chip package structure | Shin-Puu Jeng, Feng-Cheng Hsu, Po-Yao Lin | 2023-09-12 |
| 11742220 | Integrated passive device package and methods of forming same | Feng-Cheng Hsu, Jui-Pin Hung, Shin-Puu Jeng | 2023-08-29 |
| 11735572 | Integrated circuit package and method forming same | Shin-Puu Jeng, Feng-Cheng Hsu | 2023-08-22 |
| 11728256 | Reinforcing package using reinforcing patches | Chia-Kuei Hsu, Ming-Chih Yew, Po-Yao Lin, Feng-Cheng Hsu, Shin-Puu Jeng | 2023-08-15 |
| 11675957 | Integrated circuit stack verification method and system for performing the same | Feng-Wei Kuo, Chin-Yuan Huang, Kai-Yun Lin, Ho-Hsiang Chen, Chewn-Pu Jou | 2023-06-13 |
| 11670577 | Chip package with redistribution structure having multiple chips | Shin-Puu Jeng, Po-Hao Tsai, Po-Yao Chuang, Feng-Cheng Hsu, Techi Wong | 2023-06-06 |
| 11610864 | Chip package structure and method of forming the same | Shin-Puu Jeng, Feng-Cheng Hsu | 2023-03-21 |
| 11605600 | Package structure with reinforced element and formation method thereof | Shin-Puu Jeng, Po-Yao Lin, Chia-Hsiang Lin | 2023-03-14 |
| 11581250 | Package with metal-insulator-metal capacitor and method of manufacturing the same | Der-Chyang Yeh, Chiung-Han Yeh | 2023-02-14 |
| 11532569 | Method for manufacturing semiconductor package structure | Jui-Pin Hung, Feng-Cheng Hsu, Shin-Puu Jeng, De-Dui Liao | 2022-12-20 |
| 11508710 | Method of forming semiconductor device package | Po-Yao Lin, Cheng-Yi Hong, Feng-Cheng Hsu, Shin-Puu Jeng, Shu-Shen Yeh +1 more | 2022-11-22 |
| 11469208 | Method of manufacturing semiconductor package structure | Shin-Puu Jeng, Feng-Cheng Hsu | 2022-10-11 |
| 11456257 | Semiconductor package with dual sides of metal routing | Shin-Puu Jeng, Hsien-Wen Liu, Po-Yao Chuang, Feng-Cheng Hsu, Po-Yao Lin | 2022-09-27 |
| 11443993 | Chip package structure with cavity in interposer | Shin-Puu Jeng, Feng-Cheng Hsu | 2022-09-13 |
| 11417620 | Semiconductor device encapsulated by molding material attached to redestribution layer | Shin-Puu Jeng, Feng-Cheng Hsu | 2022-08-16 |
| 11404394 | Chip package structure with integrated device integrated beneath the semiconductor chip | Feng-Cheng Hsu, Shin-Puu Jeng | 2022-08-02 |