Issued Patents All Time
Showing 26–50 of 105 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11456281 | Architecture and processes to enable high capacity memory packages through memory die stacking | Yi Li, Zhiguo Qian, Prasad Ramanathan, Saikumar Jayaraman, Hector Amador +3 more | 2022-09-27 |
| 11450629 | Intra-semiconductor die communication via waveguide in a multi-die semiconductor package | Zhi Qian, Jian Yong XIE | 2022-09-20 |
| 11437366 | Tunable passive semiconductor elements | Zhichao Zhang, Yidnekachew S. Mekonnen | 2022-09-06 |
| 11387188 | High density interconnect structures configured for manufacturing and performance | Henning Braunisch, Ajay Jain, Zhiguo Qian | 2022-07-12 |
| 11322445 | EMIB copper layer for signal and power routing | Yidnekachew S. Mekonnen, Dae-Woo Kim, Sujit Sharan | 2022-05-03 |
| 11296031 | Dielectric-filled trench isolation of vias | Zhiguo Qian, Jianyong Xie | 2022-04-05 |
| 11295998 | Stiffener and package substrate for a semiconductor package | Stephen Christianson, Stephen H. Hall, Emile Davies-Venn, Dong-Ho Han, Konika Ganguly +4 more | 2022-04-05 |
| 11291133 | Selective ground flood around reduced land pad on package base layer to enable high speed land grid array (LGA) socket | Zhichao Zhang, Gregorio R. Murtagian, Kuang Liu | 2022-03-29 |
| 11276635 | Horizontal pitch translation using embedded bridge dies | Sujit Sharan, Zhiguo Qian, Yidnekachew S. Mekonnen, Zhichao Zhang, Jianyong Xie | 2022-03-15 |
| 11244890 | Ground via clustering for crosstalk mitigation | Zhiguo Qian, Yu Zhang | 2022-02-08 |
| 11222848 | Power delivery for embedded bridge die utilizing trench structures | Zhiguo Qian, Jianyong Xie | 2022-01-11 |
| 11222847 | Enabling long interconnect bridges | Ravindranath V. Mahajan, Zhiguo Qian, Henning Braunisch, Sujit Sharan | 2022-01-11 |
| 11212932 | Pin count socket having reduced pin count and pattern transformation | Srikant Nekkanty, Zhichao Zhang | 2021-12-28 |
| 11095045 | Slow wave structure for millimeter wave antennas | Zhichao Zhang, Jiwei Sun | 2021-08-17 |
| 11094633 | Bridge die design for high bandwidth memory interface | Zhiguo Qian, Dae-Woo Kim, Jackie C. Preciado | 2021-08-17 |
| 11089689 | Fine feature formation techniques for printed circuit boards | Eric J. Li, Kai Xiao, Gong Ouyang, Zhichao Zhang | 2021-08-10 |
| 11081434 | Package substrates with magnetic build-up layers | Zhiguo Qian, Kaladhar Radhakrishnan | 2021-08-03 |
| 10992342 | Simplified multimode signaling techniques | Yidnekachew S. Mekonnen, Henning Braunisch | 2021-04-27 |
| 10950550 | Semiconductor package with through bridge die connections | Zhiguo Qian, Jianyong Xie | 2021-03-16 |
| 10910314 | Conductive coating for a microelectronics package | Li-Sheng Weng, Chung-Hao Chen, Emile Davies-Venn, Mitul Modi | 2021-02-02 |
| 10892225 | Die interconnect structures and methods | Zhiguo Qian | 2021-01-12 |
| 10886171 | Rlink-on-die interconnect features to enable signaling | Yu Zhang | 2021-01-05 |
| 10867926 | High density interconnect structures configured for manufacturing and performance | Henning Braunisch, Ajay Jain, Zhiguo Qian | 2020-12-15 |
| 10854539 | Ground via clustering for crosstalk mitigation | Zhiguo Qian, Yu Zhang | 2020-12-01 |
| 10833020 | High density interconnect structures configured for manufacturing and performance | Henning Braunisch, Ajay Jain, Zhiguo Qian | 2020-11-10 |