BP

Brennan Peterson

IN Intel: 9 patents #4,428 of 30,777Top 15%
AB Asml Netherlands B.V.: 7 patents #627 of 3,192Top 20%
FE Fei: 4 patents #139 of 681Top 25%
BN Bruker Nano: 1 patents #76 of 148Top 55%
NI Nanometrics Incorporated: 1 patents #69 of 127Top 55%
SF SUNY Research Foundation: 1 patents #430 of 1,231Top 35%
Overall (All Time): #169,176 of 4,157,543Top 5%
24
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
12386261 In-resist process for high density contact formation Phillip D. Hustad 2025-08-12
12169366 Voltage contrast metrology mark Cyrus E. Tabery, Simon Hendrik Celine Van Gorp, Simon Philip Spencer Hastings 2024-12-17
12112260 Metrology apparatus and method for determining a characteristic of one or more structures on a substrate Lorenzo Tripodi, Patrick Warnaar, Grzegorz Grzela, Mohammadreza Hajiahmadi, Farzad Farhadzadeh +5 more 2024-10-08
11822255 Process window based on defect probability Abraham SLACHTER, Stefan Hunsche, Wim Tjibbo Tel, Anton Bernhard Van Oosten, Koenraad VAN INGEN SCHENAU +1 more 2023-11-21
11815349 Methods and systems for inspecting integrated circuits based on X-rays Hak Chuah Sim, Andrew George Reid, Nabil Farah Dawahre Olivieri 2023-11-14
11187994 Method for controlling a manufacturing process and associated apparatuses Mohammad Reza KAMALI 2021-11-30
11087065 Method of manufacturing devices Sunit S. Mahajan, Abraham SLACHTER, Koen Wilhelmus Cornelis Adrianus Van Der Straten, Antonio CORRADI, Pieter J. Woltgens 2021-08-10
11079687 Process window based on defect probability Abraham SLACHTER, Stefan Hunsche, Wim Tjibbo Tel, Anton Bernhard Van Oosten, Koenraad VAN INGEN SCHENAU +1 more 2021-08-03
10948837 Information determining apparatus and method An Lin Gao, Sanjaysingh Lalbahadoersing, Andrey Nikipelov, Alexey Olegovich POLYAKOV 2021-03-16
10883924 Metallic gratings and measurement methods thereof Sam O' Mullane, Alain C. Diebold, Nicholas James Keller 2021-01-05
10283317 High throughput TEM preparation processes and hardware for backside thinning of cross-sectional view lamella Paul Keady, Guus Das, Craig Henry, Larry Dworkin, Jeff Blackwood +2 more 2019-05-07
10254110 Via characterization for BCD and depth metrology Ke Xiao, Timothy A. Johnson 2019-04-09
9653260 High throughput TEM preparation processes and hardware for backside thinning of cross-sectional view lamella Paul Keady, Guus Das, Craig Henry, Larry Dworkin, Jeff Blackwood +2 more 2017-05-16
9184025 Measurement and endpointing of sample thickness Richard Young, Rudolf Johannes Peter Gerardus Schampers, Michael Moriarty 2015-11-10
8278718 Stressed barrier plug slot contact structure for transistor performance enhancement Kevin J. Fischer, Vinay Chikarmane 2012-10-02
8170832 Measurement and endpointing of sample thickness Richard Young, Rudolf Johannes Peter Gerardus Schampers, Michael Moriarty 2012-05-01
8120119 Stressed barrier plug slot contact structure for transistor performance enhancement Kevin J. Fischer, Vinay Chikarmane 2012-02-21
7968952 Stressed barrier plug slot contact structure for transistor performance enhancement Kevin J. Fischer, Vinay Chikarmane 2011-06-28
7768126 Barrier formation and structure to use in semiconductor devices Kevin J. Fischer, Vinay Chikarmane 2010-08-03
7719062 Tuned tensile stress low resistivity slot contact structure for n-type transistor performance enhancement Kevin J. Fischer, Vinay Chikarmane 2010-05-18
7605469 Atomic layer deposited tantalum containing adhesion layer Steven W. Johnston, Kerry Spurgin 2009-10-20
7601637 Atomic layer deposited tantalum containing adhesion layer Steven W. Johnston, Kerry Spurgin 2009-10-13
7582558 Reducing corrosion in copper damascene processes Vinay Chikarmane, Kevin J. Fischer 2009-09-01
7525197 Barrier process/structure for transistor trench contact applications Vinay Chikarmane, Kevin J. Fischer 2009-04-28