Issued Patents All Time
Showing 26–46 of 46 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9876103 | Semiconductor device and transistor cell having a diode region | Ralf Siemieniec, Romain Esteve, Dethard Peters | 2018-01-23 |
| 9837527 | Semiconductor device with a trench electrode | Ralf Siemieniec, Romain Esteve, Dethard Peters | 2017-12-05 |
| 9577073 | Method of forming a silicon-carbide device with a shielded gate | Romain Esteve, Dethard Peters, Ralf Siemieniec, Thomas Aichinger, Daniel Kueck | 2017-02-21 |
| 9530850 | Semiconductor device with stripe-shaped trench gate structures and gate connector structure | Thomas Aichinger | 2016-12-27 |
| 9496346 | Silicon carbide device and a method for forming a silicon carbide device | Roland Rupp, Christian Hecht, Jens Peter Konrath, Hans-Joachim Schulze, Rudolf Elpelt | 2016-11-15 |
| 9478655 | Semiconductor device having a lower diode region arranged below a trench | Ralf Siemieniec, Romain Esteve, Dethard Peters | 2016-10-25 |
| 9257511 | Silicon carbide device and a method for forming a silicon carbide device | Roland Rupp, Christian Hecht, Jens Peter Konrath, Hans-Joachim Schulze, Rudolf Elpelt | 2016-02-09 |
| 7301192 | Dram cell pair and dram memory cell array | Johann Harter, Wolfgang Mueller, Ulrike Grüning Von Schwerin, Till Schloesser, Rolf Weis | 2007-11-27 |
| 6946345 | Self-aligned buried strap process using doped HDP oxide | Jochen Beintner, Richard A. Conti, Andreas Knorr, Rolf Weis | 2005-09-20 |
| 6927172 | Process to suppress lithography at a wafer edge | Linda A. Chen, Stephan Kudelka, Franz Zach | 2005-08-09 |
| 6767781 | Structure and method of forming bitline contacts for a vertical DRAM array using a line bitline contact mask | Larry Nesbit, Jonathan E. Faltermeier, Ramachandra Divakaruni | 2004-07-27 |
| 6699794 | Self aligned buried plate | Bertrand Flietner | 2004-03-02 |
| 6686668 | Structure and method of forming bitline contacts for a vertical DRAM array using a line bitline contact mask | Larry Nesbit, Johnathan E. Faltermeier, Ramachandra Divakaruni | 2004-02-03 |
| 6667504 | Self-aligned buried strap process using doped HDP oxide | Jochen Beintner, Richard A. Conti, Andreas Knorr, Rolf Weis | 2003-12-23 |
| 6593612 | Structure and method for forming a body contact for vertical transistor cells | Ulrike Gruening, Helmut Klose | 2003-07-15 |
| 6573137 | Single sided buried strap | Ramachandra Divakaruni, Jack A. Mandelman, Gary B. Bronner, Ulrike Gruening, Stephan Kudelka +5 more | 2003-06-03 |
| 6509624 | Semiconductor fuses and antifuses in vertical DRAMS | Carl Radens, Rama Divakaruni, Larry Nesbit | 2003-01-21 |
| 6080618 | Controllability of a buried device layer | Johann Alsmeier | 2000-06-27 |
| 5976982 | Methods for protecting device components from chemical mechanical polish induced defects | Max G. Levy, Bernhard Fiegl, George R. Goth, Paul C. Parries, Matthew Sendelbach +3 more | 1999-11-02 |
| 5935873 | Deposition of carbon into nitride layer for improved selectivity of oxide to nitride etchrate for self aligned contact etching | Bruno Spuler, Juergen Wittmann, Martin Gutsche, Matthias Ilg | 1999-08-10 |
| 5734804 | Method for displaying machine malfunctions | — | 1998-03-31 |