Issued Patents All Time
Showing 126–150 of 552 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10388731 | Stacked nanowire device width adjustment by gas cluster ion beam (GCIB) | Kangguo Cheng, Xin Miao, Ruilong Xie | 2019-08-20 |
| 10388754 | Unmerged epitaxial process for FinFET devices with aggressive fin pitch scaling | Xiuyu Cai, Kangguo Cheng, Ali Khakifirooz, Ruilong Xie | 2019-08-20 |
| 10388769 | Parasitic capacitance reducing contact structure in a finFET | Miaomiao Wang, Chun-Chen Yeh, Hui Zang | 2019-08-20 |
| 10388768 | Parasitic capacitance reducing contact structure in a finFET | Miaomiao Wang, Chun-Chen Yeh, Hui Zang | 2019-08-20 |
| 10381346 | Logic gate designs for 3D monolithic direct stacked VTFET | Chen Zhang, Terence B. Hook | 2019-08-13 |
| 10381273 | Vertically stacked multi-channel transistor structure | Kangguo Cheng, Chun-Chen Yeh, Ruilong Xie | 2019-08-13 |
| 10374060 | VFET bottom epitaxy formed with anchors | Chen Zhang | 2019-08-06 |
| 10374064 | Fin field effect transistor complementary metal oxide semiconductor with dual strained channels with solid phase doping | Kangguo Cheng, Ruilong Xie | 2019-08-06 |
| 10366931 | Nanosheet devices with CMOS epitaxy and method of forming | Ruilong Xie, Cheng Chi, Pietro Montanini, Nicolas Loubet | 2019-07-30 |
| 10367069 | Fabrication of vertical field effect transistor structure with controlled gate length | Kangguo Cheng, Ruilong Xie, Chun-Chen Yeh | 2019-07-30 |
| 10361315 | Method and apparatus of fabricating source and drain epitaxy for vertical field effect transistor | Chun-Chen Yeh, Kangguo Cheng, Ruilong Xie, Cheng Chi, Chen Zhang | 2019-07-23 |
| 10361210 | Low-drive current FinFET structure for improving circuit density of ratioed logic in SRAM devices | Veeraraghavan S. Basker, Dechao Guo, Zuoguang Liu, Chun-Chen Yeh | 2019-07-23 |
| 10354960 | Support for long channel length nanowire transistors | Karthik Balakrishnan, Isaac Lauer, Jeffrey W. Sleight | 2019-07-16 |
| 10347739 | Extended contact area using undercut silicide extensions | Effendi Leobandung, Soon-Cheon Seo, Chun-Chen Yeh | 2019-07-09 |
| 10347765 | Split fin field effect transistor enabling back bias on fin type field effect transistors | Veeraraghavan S. Basker, Zuoguang Liu, Xin Miao | 2019-07-09 |
| 10347719 | Nanosheet transistors on bulk material | Kangguo Cheng, Ruilong Xie, Chun-Chen Yeh | 2019-07-09 |
| 10340340 | Multiple-threshold nanosheet transistors | Ruqiang Bao, Michael A. Guillorn, Terence B. Hook, Nicolas Loubet, Robert R. Robison +1 more | 2019-07-02 |
| 10340364 | H-shaped VFET with increased current drivability | Chen Zhang, Kangguo Cheng, Xin Miao, Wenyu Xu | 2019-07-02 |
| 10332971 | Replacement metal gate stack for diffusion prevention | Takashi Ando, Johnathan E. Faltermeier, Su Chen Fan, Sivananda K. Kanakasabapathy, Injo Ok | 2019-06-25 |
| 10332961 | Inner spacer for nanosheet transistors | Kangguo Cheng, Ruilong Xie, Chun-Chen Yeh | 2019-06-25 |
| 10332959 | Bulk to silicon on insulator device | Terence B. Hook, Joshua M. Rubin | 2019-06-25 |
| 10319840 | Fin field effect transistor fabrication and devices having inverted T-shaped gate | Veeraraghavan S. Basker, Zuoguang Liu, Chun-Chen Yeh | 2019-06-11 |
| 10319835 | Embedded bottom metal contact formed by a self-aligned contact process for vertical transistors | Su Chen Fan, Zuoguang Liu, Heng Wu | 2019-06-11 |
| 10319811 | Semiconductor device including fin having condensed channel region | Hong He, Effendi Leobandung, Gen Tsutsui | 2019-06-11 |
| 10319731 | Integrated circuit structure having VFET and embedded memory structure and method of forming same | Ruilong Xie, Chun-Chen Yeh, Kangguo Cheng | 2019-06-11 |