Issued Patents All Time
Showing 26–50 of 220 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10794948 | Electromigration monitor | Fen Chen, John A. Griesemer, Chandrasekaran Kothandaraman, John M. Safran, Timothy D. Sullivan +2 more | 2020-10-06 |
| 10784200 | Ionizing radiation blocking in IC chip to reduce soft errors | Ian D. Melville, Kevin S. Petrarca, Kenneth P. Rodbell | 2020-09-22 |
| 10677833 | Electromigration monitor | Fen Chen, John A. Griesemer, Chandrasekaran Kothandaraman, John M. Safran, Timothy D. Sullivan +2 more | 2020-06-09 |
| 10636759 | Methods of forming integrated circuit structure for joining wafers and resulting structure | Tanya A. Atanasova | 2020-04-28 |
| 10438894 | Chip-to-chip and chip-to-substrate interconnections in multi-chip semiconductor devices | Koushik Ramachandran, Eric D. Perfecto, Ian D. Melville | 2019-10-08 |
| 10388567 | Thru-silicon-via structures | Fen Chen, Carole D. Graas, Xiao Hu Liu | 2019-08-20 |
| 10296698 | Forming multi-sized through-silicon-via (TSV) structures | Troy L. Graves-Abe | 2019-05-21 |
| 10276461 | Split probe pad structure and method | Ian D. Melville | 2019-04-30 |
| 10242947 | SOI wafers with buried dielectric layers to prevent CU diffusion | Anthony K. Stamper, John A. Fitzsimmons | 2019-03-26 |
| 10215695 | Inspection system and method for detecting defects at a materials interface | Michael Shur | 2019-02-26 |
| 10199315 | Post zero via layer keep out zone over through silicon via reducing BEOL pumping effects | John M. Safran | 2019-02-05 |
| 10170337 | Implant after through-silicon via (TSV) etch to getter mobile ions | Christopher N. Collins, Troy L. Graves-Abe, Brian J. Greene, Robert Hannon, Herbert L. Ho +1 more | 2019-01-01 |
| 10103119 | Methods of forming integrated circuit structure for joining wafers and resulting structure | Tanya A. Atanasova | 2018-10-16 |
| 10096557 | Tiled-stress-alleviating pad structure | Ekta Misra, Krishna R. Tunga | 2018-10-09 |
| 10079175 | Insulating a via in a semiconductor substrate | Jennifer A. Oakley, Kevin S. Petrarca, Nicole R. Reardon, Andrew H. Simon | 2018-09-18 |
| 10068899 | IC structure on two sides of substrate and method of forming | Ian D. Melville | 2018-09-04 |
| 10049979 | IC structure including TSV having metal resistant to high temperatures and method of forming same | Ian D. Melville | 2018-08-14 |
| 10037911 | Device layer transfer with a preserved handle wafer section | Anthony K. Stamper, John A. Fitzsimmons, Mark D. Jaffe, Randy L. Wolf | 2018-07-31 |
| 9966310 | Integrated circuit structure having deep trench capacitor and through-silicon via and method of forming same | John A. Fitzsimmons, Anthony K. Stamper | 2018-05-08 |
| 9929085 | Integrated circuit structure having deep trench capacitor and through-silicon via and method of forming same | John A. Fitzsimmons, Anthony K. Stamper | 2018-03-27 |
| 9892970 | Integrated circuit structure having deep trench capacitor and through-silicon via and method of forming same | John A. Fitzsimmons, Anthony K. Stamper | 2018-02-13 |
| 9891261 | Electromigration monitor | Fen Chen, John A. Griesemer, Chandrasekaran Kothandaraman, John M. Safran, Timothy D. Sullivan +2 more | 2018-02-13 |
| 9842810 | Tiled-stress-alleviating pad structure | Ekta Misra, Krishna R. Tunga | 2017-12-12 |
| 9824925 | Flip chip alignment mark exposing method enabling wafer level underfill | Kevin S. Petrarca, Nicholas A. Polomoff, Katsuyuki Sakuma | 2017-11-21 |
| 9818637 | Device layer transfer with a preserved handle wafer section | Anthony K. Stamper, John A. Fitzsimmons, Mark D. Jaffe, Randy L. Wolf | 2017-11-14 |