Issued Patents All Time
Showing 1,101–1,125 of 2,819 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10256302 | Vertical transistor with air-gap spacer | Tak H. Ning | 2019-04-09 |
| 10256231 | Forming vertical transistors and metal-insulator-metal capacitors on the same chip | Ruilong Xie, Tenko Yamashita, Chun-Chen Yeh | 2019-04-09 |
| 10256230 | Co-fabrication of vertical diodes and fin field effect transistors on the same substrate | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2019-04-09 |
| 10256154 | Uniform shallow trench isolation | Junli Wang, Peng Xu, Chen Zhang | 2019-04-09 |
| 10254244 | Biosensor having a sensing gate dielectric and a back gate dielectric | — | 2019-04-09 |
| 10249762 | Vertically aligned nanowire channels with source/drain interconnects for nanosheet transistors | Marc A. Bergendahl, Eric R. Miller, John R. Sporre, Sean Teehan | 2019-04-02 |
| 10249755 | Transistor with asymmetric source/drain overlap | Peng Xu, Heng Wu, Zhenxing Bi | 2019-04-02 |
| 10249738 | Nanosheet channel-to-source and drain isolation | Marc A. Bergendahl, Fee Li Lie, Eric R. Miller, John R. Sporre, Sean Teehan | 2019-04-02 |
| 10249731 | Vertical FET with sharp junctions | Juntao Li, Peng Xu, Heng Wu | 2019-04-02 |
| 10249709 | Stacked nanosheet field effect transistor device with substrate isolation | Juntao Li, Geng Wang, Qintao Zhang | 2019-04-02 |
| 10249541 | Forming a hybrid channel nanosheet semiconductor structure | Peng Xu | 2019-04-02 |
| 10249539 | Nanosheet transistors having different gate dielectric thicknesses on the same chip | Juntao Li, Geng Wang, Qintao Zhang | 2019-04-02 |
| 10249538 | Method of forming vertical field effect transistors with different gate lengths and a resulting structure | Yi Qi, Hsien-Ching Lo, Jianwei Peng, Wei Hong, Yanping Shen +5 more | 2019-04-02 |
| 10249537 | Method and structure for forming FinFET CMOS with dual doped STI regions | Veeraraghavan S. Basker, Theodorus E. Standaert, Junli Wang | 2019-04-02 |
| 10249536 | Semiconductor fins for FinFET devices and sidewall image transfer (SIT) processes for manufacturing the same | Veeraraghavan S. Basker, Theodorus E. Standaert | 2019-04-02 |
| 10249529 | Channel silicon germanium formation method | Nicolas Degors, Shawn P. Fetterolf, Ahmet S. Ozcan | 2019-04-02 |
| 10243062 | Fabrication of a vertical fin field effect transistor having a consistent channel width | Juntao Li | 2019-03-26 |
| 10243061 | Nanosheet transistor | Juntao Li, Heng Wu, Peng Xu | 2019-03-26 |
| 10243054 | Integrating standard-gate and extended-gate nanosheet transistors on the same substrate | Juntao Li, Geng Wang, Qintao Zhang | 2019-03-26 |
| 10243046 | Fully depleted silicon-on-insulator device formation | Shawn P. Fetterolf, Ahmet S. Ozcan | 2019-03-26 |
| 10243044 | FinFETs with high quality source/drain structures | Ali Khakifirooz, Alexander Reznicek, Charan V. Surisetty | 2019-03-26 |
| 10243042 | FinFET with reduced parasitic capacitance | Darsen D. Lu, Xin Miao, Tenko Yamashita | 2019-03-26 |
| 10242986 | Flipped vertical field-effect-transistor | Xin Miao, Wenyu Xu, Chen Zhang | 2019-03-26 |
| 10242983 | Semiconductor device with increased source/drain area | Chi-Chun Liu, Peng Xu, Jie Yang | 2019-03-26 |
| 10242980 | Semiconductor fin isolation by a well trapping fin portion | Henry K. Utomo, Ramachandra Divakaruni, Ravikumar Ramachandran, Huiling Shang, Reinaldo Vega | 2019-03-26 |