Issued Patents All Time
Showing 1,051–1,075 of 2,819 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10312325 | Techniques for forming finFET transistors with same fin pitch and different source/drain epitaxy configurations | Peng Xu | 2019-06-04 |
| 10312323 | Bulk nanosheet with dielectric isolation | Bruce B. Doris, Junli Wang | 2019-06-04 |
| 10312318 | Metal-insulator-metal capacitor structure | Veeraraghavan S. Basker, Theodorus E. Standaert, Junli Wang | 2019-06-04 |
| 10312148 | Method and structure for forming MOSFET with reduced parasitic capacitance | Peng Xu, Chen Zhang | 2019-06-04 |
| 10312132 | Forming sacrificial endpoint layer for deep STI recess | Juntao Li, Sebastian Naczas, Peng Xu | 2019-06-04 |
| 10312104 | Sacrificial mandrel structure with oxide pillars having different widths and resulting fins arrangements | — | 2019-06-04 |
| 10304944 | Semiconductor structure with an L-shaped bottom | Wilfried E. Haensch, Ali Khakifirooz, Davood Shahrjerdi | 2019-05-28 |
| 10304941 | Replacement metal gate structures | Veeraraghavan S. Basker, Theodorus E. Standaert, Junli Wang | 2019-05-28 |
| 10304742 | Forming insulator fin structure in isolation region to support gate structures | Peng Xu | 2019-05-28 |
| 10304736 | Self-aligned contact | Xin Miao, Wenyu Xu, Chen Zhang | 2019-05-28 |
| 10297689 | Precise control of vertical transistor gate length | Veeraraghavan S. Basker, Theodorus E. Standaert, Junli Wang | 2019-05-21 |
| 10297688 | Vertical field effect transistor with improved reliability | Xin Miao, Philip J. Oldiges, Wenyu Xu, Chen Zhang | 2019-05-21 |
| 10297686 | Tapered vertical FET having III-V channel | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2019-05-21 |
| 10297667 | Fin field-effect transistor for input/output device integrated with nanosheet field-effect transistor | Chun Wing Yeung, Chen Zhang, Peng Xu, Huiming Bu | 2019-05-21 |
| 10297507 | Self-aligned vertical field-effect transistor with epitaxially grown bottom and top source drain regions | Shogo Mochizuki, Tenko Yamashita, Chen Zhang | 2019-05-21 |
| 10297452 | Methods of forming a gate contact structure for a transistor | Ruilong Xie, Hui Zang, Tenko Yamashita, Chun-Chen Yeh | 2019-05-21 |
| 10297448 | SiGe fins formed on a substrate | Veeraraghavan S. Basker, Theodorus E. Standaert, Junli Wang | 2019-05-21 |
| 10290633 | CMOS compatible fuse or resistor using self-aligned contacts | Veeraraghavan S. Basker, Theodorus E. Standaert, Junli Wang | 2019-05-14 |
| 10290574 | Embedded metal-insulator-metal (MIM) decoupling capacitor in monolitic three-dimensional (3D) integrated circuit (IC) structure | Geng Wang, Chengwen Pei, Juntao Li | 2019-05-14 |
| 10283625 | Integrated strained stacked nanosheet FET | Ramachandra Divakaruni, Juntao Li, Xin Miao | 2019-05-07 |
| 10283606 | Vertical fin with a gate structure having a modified gate geometry | Peng Xu | 2019-05-07 |
| 10283602 | Fully depleted SOI device for reducing parasitic back gate capacitance | Ramachandra Divakaruni | 2019-05-07 |
| 10283601 | Strained silicon germanium fin with block source/drain epitaxy and improved overlay capacitance | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2019-05-07 |
| 10283592 | Approach to minimization of strain loss in strained fin field effect transistors | Zhenxing Bi, Juntao Li, Peng Xu | 2019-05-07 |
| 10283586 | Capacitors | Veeraraghavan S. Basker, Christopher J. Penny, Theodorus E. Standaert, Junli Wang | 2019-05-07 |