HB

Huiming Bu

IBM: 89 patents #701 of 70,183Top 1%
Globalfoundries: 9 patents #393 of 4,424Top 9%
TE Tessera: 3 patents #129 of 271Top 50%
AS Adeia Semiconductor Solutions: 1 patents #22 of 57Top 40%
SF SUNY Research Foundation: 1 patents #469 of 1,165Top 45%
SS Stmicroelectronics Sa: 1 patents #938 of 1,676Top 60%
📍 Glenmont, NY: #3 of 67 inventorsTop 5%
🗺 New York: #653 of 115,490 inventorsTop 1%
Overall (All Time): #16,713 of 4,157,543Top 1%
93
Patents All Time

Issued Patents All Time

Showing 76–93 of 93 patents

Patent #TitleCo-InventorsDate
8637931 finFET with merged fins and vertical silicide Veeraraghavan S. Basker, Andres Bryant, Wilfried E. Haensch, Effendi Leobandung, Chung-Hsun Lin +3 more 2014-01-28
8592264 Source-drain extension formation in replacement metal gate transistor device Takashi Ando, Ramachandra Divakaruni, Bruce B. Doris, Chung-Hsun Lin, Huiling Shang +1 more 2013-11-26
8592290 Cut-very-last dual-EPI flow Veeraraghavan S. Basker, Kangguo Cheng, Balasubramanian S. Haran, Nicolas Loubet, Shom Ponoth +3 more 2013-11-26
8575709 High-k dielectric gate structures resistant to oxide growth at the dielectric/silicon substrate interface and methods of manufacture thereof Michael P. Chudzik, Wei He, William K. Henson, Siddarth A. Krishnan, Unoh Kwon +2 more 2013-11-05
8569152 Cut-very-last dual-epi flow Veeraraghavan S. Basker, Kangguo Cheng, Balasubramanian S. Haran, Nicolas Loubet, Shom Ponoth +3 more 2013-10-29
8507992 High-K metal gate CMOS Renee T. Mo, Michael P. Chudzik, William K. Henson, Mukesh V. Khare, Vijay Narayanan 2013-08-13
8455313 Method for fabricating finFET with merged fins and vertical silicide Veeraraghavan S. Basker, Andres Bryant, Wilfried E. Haensch, Effendi Leobandung, Chung-Hsun Lin +3 more 2013-06-04
8445334 SOI FinFET with recessed merged Fins and liner for enhanced stress coupling Veeraraghavan S. Basker, Effendi Leobandung, Theodorus E. Standaert, Tenko Yamashita, Chun-Chen Yeh 2013-05-21
8441039 Nanopillar E-fuse structure and process Satya N. Chakravarti, Dechao Guo, Keith Kwong Hon Wong 2013-05-14
8344428 Nanopillar E-fuse structure and process Satya N. Chakravarti, Dechao Guo, Keith Kwong Hon Wong 2013-01-01
8318565 High-k dielectric gate structures resistant to oxide growth at the dielectric/silicon substrate interface and methods of manufacture thereof Michael P. Chudzik, Wei He, William K. Henson, Siddarth A. Krishnan, Unoh Kwon +2 more 2012-11-27
8288218 Device structure, layout and fabrication method for uniaxially strained transistors Stephen W. Bedell, Kangguo Cheng, Bruce B. Doris, Johnathan E. Faltermeier, Ali Khakifirooz +2 more 2012-10-16
8258037 Nanopillar decoupling capacitor Satya N. Chakravarti, Dechao Guo, Keith Kwong Hon Wong 2012-09-04
8097520 Integration of passive device structures with metal gate layers Satya N. Chakravarti, Dechao Guo, Keith Kwong Hon Wong 2012-01-17
8035173 CMOS transistors with differential oxygen content high-K dielectrics Eduard A. Cartier, Bruce B. Doris, Young-Hee Kim, Barry P. Linder, Vijay Narayanan +2 more 2011-10-11
7943460 High-K metal gate CMOS Renee T. Mo, Michael P. Chudzik, William K. Henson, Mukesh V. Khare, Vijay Narayanan 2011-05-17
7863123 Direct contact between high-κ/metal gate and wiring process flow Michael P. Chudzik, Ricardo A. Donaton, Naim Moumen, Hongwen Yan 2011-01-04
7696036 CMOS transistors with differential oxygen content high-k dielectrics Eduard A. Cartier, Bruce B. Doris, Young-Hee Kim, Barry P. Linder, Vijay Narayanan +2 more 2010-04-13