Issued Patents All Time
Showing 176–200 of 225 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9356121 | Divot-free planarization dielectric layer for replacement gate | Sanjay C. Mehta | 2016-05-31 |
| 9330938 | Method of patterning dopant films in high-k dielectrics in a soft mask integration scheme | Takashi Ando, Balaji Kannan, Siddarth A. Krishnan, Unoh Kwon, Rekha Rajaram | 2016-05-03 |
| 9318581 | Forming wrap-around silicide contact on finFET | Dechao Guo, Zuoguang Liu, Shogo Mochizuki | 2016-04-19 |
| 9299706 | Single source/drain epitaxy for co-integrating nFET semiconductor fins and pFET semiconductor fins | Alexander Reznicek | 2016-03-29 |
| 9202698 | Replacement gate electrode with multi-thickness conductive metallic nitride layers | Vamsi K. Paruchuri | 2015-12-01 |
| 9190409 | Replacement metal gate transistor with controlled threshold voltage | Kenzo Manabe | 2015-11-17 |
| 9153447 | Replacement metal gate FinFET | Sanjay C. Mehta, Junli Wang, Chun-Chen Yeh, Stefan Schmitz | 2015-10-06 |
| 9093376 | Replacement metal gate FinFET | Sanjay C. Mehta, Junli Wang, Chun-Chen Yeh, Stefan Schmitz | 2015-07-28 |
| 9093558 | Integration of multiple threshold voltage devices for complementary metal oxide semiconductor using full metal gate | Lisa F. Edge, Balasubramanian S. Haran | 2015-07-28 |
| 9064744 | Structure and method to realize conformal doping in deep trench applications | Veeraraghavan S. Basker, Sivananda K. Kanakasabapathy, Babar A. Khan | 2015-06-23 |
| 9059314 | Structure and method to obtain EOT scaled dielectric stacks | Takashi Ando, Lisa F. Edge, Sufi Zafar, Changhwan Choi, Paul C. Jamison +2 more | 2015-06-16 |
| 9054127 | Robust replacement gate integration | Sanjay C. Mehta | 2015-06-09 |
| 9006816 | Memory device having multiple dielectric gate stacks and related methods | Prasanna Khare, Stephane Allegret-Maret, Nicolas Loubet, Qing Liu, Lisa F. Edge +2 more | 2015-04-14 |
| 9006094 | Stratified gate dielectric stack for gate dielectric leakage reduction | Paul C. Jamison | 2015-04-14 |
| 8994006 | Non-volatile memory device employing semiconductor nanoparticles | Kangguo Cheng, Robert H. Dennard, Ali Khakifirooz, Tak H. Ning, Ghavam G. Shahidi | 2015-03-31 |
| 8906793 | Borderless contact for an aluminum-containing gate | Sivananda K. Kanakasabapathy, David V. Horak | 2014-12-09 |
| 8900936 | FinFET device having reduce capacitance, access resistance, and contact resistance | Pranita Kulkarni, Ali Khakifirooz, Kangguo Cheng, Bruce B. Doris, Ghavam G. Shahidi | 2014-12-02 |
| 8901667 | High performance non-planar semiconductor devices with metal filled inter-fin gaps | Sivananda K. Kanakasabapathy | 2014-12-02 |
| 8901670 | Semiconductor device including multiple metal semiconductor alloy region and a gate structure covered by a continuous encapsulating layer | Sivananda K. Kanakasabapathy, Soon-Cheon Seo | 2014-12-02 |
| 8890255 | Structure and method for stress latching in non-planar semiconductor devices | Sivananda K. Kanakasabapathy, Sanjay C. Mehta | 2014-11-18 |
| 8877615 | Methods of manufacturing finFET devices | Veeraraghavan S. Basker, David V. Horak, Charles W. Koburger, III | 2014-11-04 |
| 8860123 | Memory device having multiple dielectric gate stacks with first and second dielectric layers and related methods | Prasanna Khare, Stephane Allegret-Maret, Nicolas Loubet, Qing Liu, Lisa F. Edge +2 more | 2014-10-14 |
| 8847323 | finFET devices | Veeraraghavan S. Basker, David V. Horak, Charles W. Koburger, III | 2014-09-30 |
| 8835232 | Low external resistance ETSOI transistors | Sivananda K. Kanakasabapathy | 2014-09-16 |
| 8835260 | Control of threshold voltages in high-k metal gate stack and structures for CMOS devices | Takashi Ando, Vijay Narayanan | 2014-09-16 |