Issued Patents All Time
Showing 126–150 of 155 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9720696 | Independent mapping of threads | Sam Gat-Shang Chu, Markus Kaltenbach, Hung Q. Le, Jentje Leenstra, Jose E. Moreira +1 more | 2017-08-01 |
| 9697117 | Multi-section garbage collection | Giles R. Frazier, Michael K. Gschwind, Younes Manton, Karl M. Taylor | 2017-07-04 |
| 9690585 | Parallel slice processor with dynamic instruction stream mapping | Lee Evan Eisen, Hung Q. Le, Jentje Leenstra, Jose E. Moreira, Bruce Joseph Ronchetti +1 more | 2017-06-27 |
| 9690586 | Processing of multiple instruction streams in a parallel slice processor | Lee Evan Eisen, Hung Q. Le, Jentje Leenstra, Jose E. Moreira, Bruce Joseph Ronchetti +1 more | 2017-06-27 |
| 9672043 | Processing of multiple instruction streams in a parallel slice processor | Lee Evan Eisen, Hung Q. Le, Jentje Leenstra, Jose E. Moreira, Bruce Joseph Ronchetti +1 more | 2017-06-06 |
| 9665372 | Parallel slice processor with dynamic instruction stream mapping | Lee Evan Eisen, Hung Q. Le, Jentje Leenstra, Jose E. Moreira, Bruce Joseph Ronchetti +1 more | 2017-05-30 |
| 9519479 | Techniques for increasing vector processing utilization and efficiency through vector lane predication prediction | Hung Q. Le, Jose E. Moreira, Pratap C. Pattnaik, Jessica Hui-Chun Tseng | 2016-12-13 |
| 9483276 | Management of shared transactional resources | Fadi Y. Busaba | 2016-11-01 |
| 9430235 | Predicting and avoiding operand-store-compare hazards in out-of-order microprocessors | Gregory W. Alexander, Khary J. Alexander, Brian W. Curran, Jonathan T. Hsieh, Christian Jacobi +2 more | 2016-08-30 |
| 9400657 | Dynamic management of a transaction retry indication | Fadi Y. Busaba | 2016-07-26 |
| 9298469 | Management of multiple nested transactions | Fadi Y. Busaba | 2016-03-29 |
| 9098653 | Verifying processor-sparing functionality in a simulation environment | Stefan Letz, Joerg Deutschle, Bodo Hoppe, Erica Stuecheli | 2015-08-04 |
| 9015025 | Verifying processor-sparing functionality in a simulation environment | Stefan Letz, Joerg Deutschle, Bodo Hoppe, Erica Stuecheli | 2015-04-21 |
| 8521992 | Predicting and avoiding operand-store-compare hazards in out-of-order microprocessors | Gregory W. Alexander, Khary J. Alexander, Brian W. Curran, Jonathan T. Hsieh, Christian Jacobi +2 more | 2013-08-27 |
| 8468325 | Predicting and avoiding operand-store-compare hazards in out-of-order microprocessors | Gregory W. Alexander, Khary J. Alexander, Brian W. Curran, Jonathan T. Hsieh, Christian Jacobi +2 more | 2013-06-18 |
| 8418180 | Thread priority method for ensuring processing fairness in simultaneous multi-threading microprocessors | James Wilson Bishop, Hung Q. Le, Dung Q. Nguyen, Balaram Sinharoy, Raymond Cheung Yeung | 2013-04-09 |
| 8082467 | Triggering workaround capabilities based on events active in a processor pipeline | Gregory W. Alexander, Fadi Y. Busaba, David A. Schroter, Eric M. Schwarz, Wesley J. Ward, III | 2011-12-20 |
| 7877580 | Branch lookahead prefetch for microprocessors | Richard J. Eickemeyer, Hung Q. Le, Dung Q. Nguyen, Benjamin W. Stolt | 2011-01-25 |
| 7650486 | Dynamic recalculation of resource vector at issue queue for steering of dependent instructions | Hung Q. Le, Dung Q. Nguyen, Raymond Cheung Yeung | 2010-01-19 |
| 7631308 | Thread priority method for ensuring processing fairness in simultaneous multi-threading microprocessors | James Wilson Bishop, Hung Q. Le, Dung Q. Nguyen, Balaram Sinharoy, Raymond Cheung Yeung | 2009-12-08 |
| 7620799 | Using a modified value GPR to enhance lookahead prefetch | Richard J. Eickemeyer, Hung Q. Le, Dung Q. Nguyen, Benjamin W. Stolt | 2009-11-17 |
| 7594096 | Load lookahead prefetch for microprocessors | Richard J. Eickemeyer, Hung Q. Le, Dung Q. Nguyen, Benjamin W. Stolt | 2009-09-22 |
| 7552318 | Branch lookahead prefetch for microprocessors | Richard J. Eickemeyer, Hung Q. Le, Dung Q. Nguyen, Benjamin W. Stolt | 2009-06-23 |
| 7549095 | Error detection enhancement in a microprocessor through the use of a second dependency matrix | Gregory W. Alexander, Lee Evan Eisen, John W. Ward, III | 2009-06-16 |
| 7478276 | Method for checkpointing instruction groups with out-of-order floating point instructions in a multi-threaded processor | James Wilson Bishop, Hung Q. Le, Michael J. Mack, Jafar Nahidi, Dung Q. Nguyen +2 more | 2009-01-13 |