Issued Patents All Time
Showing 176–200 of 235 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8983460 | Sensor and context based adjustment of the operation of a network controller | James Trethewey, Kristoffer Fleming, Ajay V. Bhatt, Roger Hurwitz, Huaiyu Liu +1 more | 2015-03-17 |
| 8963228 | Non-volatile memory device integrated with CMOS SOI FET on a single chip | Anthony I. Chou | 2015-02-24 |
| 8941189 | Fin-shaped field effect transistor (finFET) structures having multiple threshold voltages (Vt) and method of forming | Murshed Chowdhury, Benjamin Cipriany, Brian J. Greene | 2015-01-27 |
| 8940595 | Faceted intrinsic epitaxial buffer layer for reducing short channel effects while maximizing channel stress levels | Bhupesh Chandra, Paul Chang, Gregory G. Freeman, Dechao Guo, Judson R. Holt +6 more | 2015-01-27 |
| 8942333 | Apparatus and methods for clock alignment for high speed interfaces | Shobhit Singhal, Vikas Lakhanpal, Kalpesh Amrutlal Shah | 2015-01-27 |
| 8896560 | Offloading touch processing to a graphics processor | Balaji Vembu, David I. Poisner, Chaitanya R. Gandra | 2014-11-25 |
| 8890588 | Circuits and methods for asymmetric aging prevention | Kalpesh Amrutlal Shah, Francisco A. Cano | 2014-11-18 |
| 8887267 | Providing integrity verification and attestation in a hidden execution environment | Ned M. Smith, Vedvyas Shanbhogue, Purushottam Goel | 2014-11-11 |
| 8884906 | Offloading touch processing to a graphics processor | Balaji Vembu, David I. Poisner, Chaitanya R. Gandra | 2014-11-11 |
| 8839356 | Methods and apparatuses for processing wake events of communication networks | Michael A. Rothman, Vincent J. Zimmer, Patrick G. Kutch, Omer Levy | 2014-09-16 |
| 8829616 | Method and structure for body contacted FET with reduced body resistance and source to drain contact leakage | Anthony I. Chou, Murshed Chowdhury, Shreesh Narasimha | 2014-09-09 |
| 8819857 | Apparatus and method to harden computer system | Naga Gurumoorthy, Matthew J. Parker | 2014-08-26 |
| 8816473 | Planar polysilicon regions for precision resistors and electrical fuses and method of fabrication | Anthony I. Chou, Renee T. Mo, Shreesh Narasimha | 2014-08-26 |
| 8779551 | Gated diode structure for eliminating RIE damage from cap removal | Anthony I. Chou, Edward P. Maciejewski, Shreesh Narasimha, Dustin K. Slisher | 2014-07-15 |
| 8737161 | Write-leveling system and method | Shobhit Singhal, Vikas Lakhanpal | 2014-05-27 |
| 8680623 | Techniques for enabling multiple Vt devices using high-K metal gate stacks | Martin M. Frank, Vijay Narayanan, Vamsi K. Paruchuri, Jeffrey W. Sleight | 2014-03-25 |
| 8673738 | Shallow trench isolation structures | Bruce B. Doris, Kangguo Cheng, Balasubramanian S. Haran, Ali Khakifirooz, Pranita Kulkarni +1 more | 2014-03-18 |
| 8667448 | Integrated circuit having local maximum operating voltage | Anthony I. Chou, Renee T. Mo | 2014-03-04 |
| 8558313 | Bulk substrate FET integrated on CMOS SOI | Anthony I. Chou, Shreesh Narasimha, Ning Su, Huiling Shang | 2013-10-15 |
| 8510569 | Providing integrity verification and attestation in a hidden execution environment | Ned M. Smith, Vedvyas Shanbhogue, Purushottam Goel | 2013-08-13 |
| 8482075 | Structure and method for manufacturing asymmetric devices | Hasan M. Nayfeh, Andres Bryant, Nivo Rovedo, Robert R. Robison | 2013-07-09 |
| 8386823 | Method and apparatus for cost and power efficient, scalable operating system independent services | Per Hammarlund, Glenn J. Hinton, Johan G. Van De Groenendaal | 2013-02-26 |
| 8343781 | Electrical mask inspection | Anthony I. Chou, Shreesh Narasimha | 2013-01-01 |
| 8299519 | Read transistor for single poly non-volatile memory using body contacted SOI device | Anthony I. Chou | 2012-10-30 |
| 8239452 | System and method for discovering and publishing of presence information on a network | Kevin R. Moore, Peyman Oreizy, Sean Blagsvedt, Melissa W. Dunn, Marcus Harvey | 2012-08-07 |