Issued Patents All Time
Showing 351–375 of 378 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8365102 | Method for checking and fixing double-patterning layout | Dio Wang, Ken-Hsien Hsieh, Huang-Yu Chen, Li-Chun Tien, Lee-Chung Lu | 2013-01-29 |
| 8352888 | Model import for electronic design automation | Chih-Ming Lai, Wen-Chun Huang, Boren Luo, I-Chang Shin, Yao-Ching Ku +1 more | 2013-01-08 |
| 8332797 | Parameterized dummy cell insertion for process enhancement | Ying-Chou Cheng, Tsong-Hua Ou, Wen-Hao Liu, Wen-Chun Huang | 2012-12-11 |
| 8327301 | Routing method for double patterning design | Yi-Kan Cheng, Lee-Chung Lu, Chih-Ming Lai | 2012-12-04 |
| 8245174 | Double patterning friendly lithography method and system | Yi-Kan Cheng, Lee-Chung Lu | 2012-08-14 |
| 8219951 | Method of thermal density optimization for device and process enhancement | Ying-Chou Cheng, Tsong-Hua Ou, Chih-Wei Hsu, Cheng-Lung Tsai, Wen-Chun Huang +1 more | 2012-07-10 |
| 8214773 | Methods for E-beam direct write lithography | Lee-Chung Lu, Yi-Kan Cheng, Chih-Ming Lai | 2012-07-03 |
| 8214772 | Model import for electronic design automation | Chih-Ming Lai, Wen-Chun Huang, Boren Luo, I-Chang Shin, Yao-Ching Ku +1 more | 2012-07-03 |
| 8211807 | Double patterning technology using single-patterning-spacer-technique | Huang-Yu Chen, Ken-Hsien Hsieh, Tsong-Hua Ou, Fang-Yu Fan, Yuan-Te Hou +2 more | 2012-07-03 |
| 8201111 | Table-based DFM for accurate post-layout analysis | Yung-Chin Hou, Ying-Chou Cheng, Chih-Ming Lai, Yi-Kan Cheng, Chung-Kai Lin +5 more | 2012-06-12 |
| 8196072 | Method and apparatus of patterning semiconductor device | Ming-Hui Chih, Cheng Kun Tsai, Wen-Chun Huang, Chii-Ping Chen, Jiing-Feng Yang | 2012-06-05 |
| 8119310 | Mask-shift-aware RC extraction for double patterning design | Lee-Chung Lu, Yi-Kan Cheng, Hsiao-Shu Chao, Ke-Ying Su, Cheng-Hung Yeh +2 more | 2012-02-21 |
| 8037575 | Method for shape and timing equivalent dimension extraction | Ying-Chou Cheng, Chih-Ming Lai, Tsong-Hua Ou, Min-Hong Wu, Yih-Yuh Doong +4 more | 2011-10-18 |
| 8001494 | Table-based DFM for accurate post-layout analysis | Yung-Chin Hou, Ying-Chou Cheng, Chih-Ming Lai, Yi-Kan Cheng, Chung-Kai Lin +5 more | 2011-08-16 |
| 7954072 | Model import for electronic design automation | Chih-Ming Lai, Wen-Chun Huang, Boren Luo, I-Chang Shin, Yao-Ching Ku +1 more | 2011-05-31 |
| 7924401 | Seal ring arrangements for immersion lithography systems | Burn Jeng Lin, Tsai-Sheng Gau, Chun-Kuang Chen, Shinn-Sheng Yu, Jen-Chieh Shih | 2011-04-12 |
| 7797668 | Method for optimally converting a circuit design into a semiconductor device | Gwan Sin Chang, Chih-Ming Lai, Yung-Chin Hou | 2010-09-14 |
| 7783999 | Electrical parameter extraction for integrated circuit design | Tsong-Hua Ou, Ying-Chou Cheng, Chia-Chi Lin, Chih-Ming Lai, Min-Hong Wu +3 more | 2010-08-24 |
| 7778805 | Regression system and methods for optical proximity correction modeling | Wen-Chun Huang, Chih-Ming Lai, Chen Kun Tsai, Chien-Wen Lai, Cherng-Shyan Tsay +2 more | 2010-08-17 |
| 7725861 | Method, apparatus, and system for LPC hot spot fix | Yi-Kan Cheng, Chih-Ming Lai | 2010-05-25 |
| 7685558 | Method for detection and scoring of hot spots in a design layout | Chih-Ming Lai, I-Chang Shin, Yao-Ching Ku, Cliff Hou | 2010-03-23 |
| 7667821 | Multi-focus scanning with a tilted mask or wafer | Burn Jeng Lin, Chun-Kuang Chen, Tsai-Sheng Gau, Chia-Hui Lin, Jen-Chieh Shih | 2010-02-23 |
| 7517639 | Seal ring arrangements for immersion lithography systems | Burn Jeng Lin, Tsai-Sheng Gau, Chun-Kuang Chen, Shinn-Sheng Yu, Jen-Chieh Shih | 2009-04-14 |
| 7501226 | Immersion lithography system with wafer sealing mechanisms | Burn Jeng Lin, Tsai-Sheng Gau, Chun-Kung Chen, Shing Shen Yu, Jen-Chieh Shih | 2009-03-10 |
| 7399709 | Complementary replacement of material | Burn Jeng Lin, Hua-Tai Lin, Tsai-Sheng Gau, Bang-Chien Ho | 2008-07-15 |