Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11239154 | Fishbone structure enhancing spacing with adjacent conductive line in power network | Chien-Ju Chao, Yi-Chuin Tsai, Kuo-Nan Yang, Chung-Hsing Wang | 2022-02-01 |
| 9627310 | Semiconductor device with self-aligned interconnects | Shih-Ming Chang, Ken-Hsien Hsieh, Tsong-Hua Ou, Ru-Gun Liu, Yuan-Te Hou | 2017-04-18 |
| 9553043 | Interconnect structure having smaller transition layer via | Lee-Chung Lu, Wen-Hao Chen, Yuan-Te Hou, Yu-Hsiang Kao, Dian-Hau Chen +2 more | 2017-01-24 |
| 9317650 | Double patterning technology (DPT) layout routing | Huang-Yu Chen, Yuan-Te Hou, Wen-Hao Chen, Chung-Hsing Wang, Yi-Kan Cheng | 2016-04-19 |
| 9087170 | Cell layout design and method | Chin-Hsiung Hsu, Yuan-Te Hou, Li-Chun Tien, Hui-Zhong Zhuang, Wen-Hao Chen +1 more | 2015-07-21 |
| 8907497 | Semiconductor device with self-aligned interconnects and blocking portions | Shih-Ming Chang, Ken-Hsien Hsieh, Tsong-Hua Ou, Ru-Gun Liu, Yuan-Te Hou | 2014-12-09 |
| 8850368 | Double patterning technology (DPT) layout routing | Huang-Yu Chen, Yuan-Te Hou, Wen-Hao Chen, Chung-Hsing Wang, Yi-Kan Cheng | 2014-09-30 |
| 8418111 | Method and apparatus for achieving multiple patterning technology compliant design layout | Huang-Yu Chen, Yuan-Te Hou, Lee-Chung Lu, Ru-Gun Liu, Ken-Hsien Hsieh +3 more | 2013-04-09 |
| 8211807 | Double patterning technology using single-patterning-spacer-technique | Huang-Yu Chen, Ken-Hsien Hsieh, Tsong-Hua Ou, Yuan-Te Hou, Ming-Feng Shieh +2 more | 2012-07-03 |