Issued Patents All Time
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11865518 | Method for manufacturing electroless plating substrate and method for forming metal layer on surface of substrate | Tzu-Chien Wei | 2024-01-09 |
| 10828624 | Self-adsorbed catalyst composition, method for preparing the same and method for manufacturing electroless plating substrate | Tzu-Chien Wei | 2020-11-10 |
| 9754073 | Layout optimization for integrated circuit design | Huang-Yu Chen, Yuan-Te Hou, Ken-Hsien Hsieh, Ru-Gun Liu, Lee-Chung Lu | 2017-09-05 |
| 9553043 | Interconnect structure having smaller transition layer via | Lee-Chung Lu, Wen-Hao Chen, Yuan-Te Hou, Fang-Yu Fan, Dian-Hau Chen +2 more | 2017-01-24 |
| 9418196 | Layout optimization for integrated circuit design | Huang-Yu Chen, Yuan-Te Hou, Ken-Hsien Hsieh, Ru-Gun Liu, Lee-Chung Lu | 2016-08-16 |
| 9292645 | Layout optimization for integrated circuit design | Huang-Yu Chen, Yuan-Te Hou, Ken-Hsien Hsieh, Ru-Gun Liu, Lee-Chung Lu | 2016-03-22 |
| 8898600 | Layout optimization for integrated design | Huang-Yu Chen, Yuan-Te Hou, Ken-Hsien Hsieh, Ru-Gun Liu, Lee-Chung Lu | 2014-11-25 |