Issued Patents All Time
Showing 1–15 of 15 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12336258 | Semiconductor structure | Yen-Ching Wu, Kuan-Lun Cheng, Wen-Chien Lin, Chih-Ling Hsiao | 2025-06-17 |
| 10860769 | Method and system for integrated circuit design with on-chip variation and spatial correlation | Katherine H. Chiang, Cheng Hsiao, Chang-Yu Huang, Juan Chen, Ke-Wei Su +2 more | 2020-12-08 |
| 10521538 | Method and system for integrated circuit design with on-chip variation and spatial correlation | Katherine H. Chiang, Cheng Hsiao, Chang-Yu Huang, Juan Chen, Ke-Wei Su +2 more | 2019-12-31 |
| 10216879 | Method for establishing aging model of device and analyzing aging state of device with aging model | Yi-Shun Huang, Wai-Kit Lee, Ya-Chin Liang, Cheng Hsiao, Juan Chen +4 more | 2019-02-26 |
| 10169506 | Circuit design method and system | Chung-Hsing Wang, King-Ho Tam, Yen-Pin Chen, Wen-Hao Chen, Chih-Hsiang Yao | 2019-01-01 |
| 10019545 | Simulation scheme including self heating effect | Min-Chie Jeng, Ke-Wei Su, Yi-Shun Huang, Ya-Chin Liang, Cheng Hsiao +2 more | 2018-07-10 |
| 9477803 | Method of generating techfile having reduced corner variation value | Chung-Hsing Wang, King-Ho Tam, Yen-Pin Chen, Wen-Hao Chen, Chih-Hsiang Yao | 2016-10-25 |
| 9378314 | Analytical model for predicting current mismatch in metal oxide semiconductor arrays | Amit Kundu, Jaw-Juinn Horng, Yung-Chow Peng, Shih-Cheng Yang | 2016-06-28 |
| 9317647 | Method of designing a circuit and system for implementing the method | Shyh-Horng Yang, Chung-Hsing Wang, Kuo-Nan Yang, Shou-En Liu, Jhong-Sheng Wang +1 more | 2016-04-19 |
| 9245073 | Pattern density-dependent mismatch modeling flow | Chung-Min Fu, Wan-Yu Lo, Shih-Cheng Yang, Yung-Chow Peng | 2016-01-26 |
| 8832619 | Analytical model for predicting current mismatch in metal oxide semiconductor arrays | Amit Kundu, Jaw-Juinn Horng, Yung-Chow Peng, Shih-Cheng Yang | 2014-09-09 |
| 8275584 | Unified model for process variations in integrated circuits | Cheng-Tai Hsiao, Sally Liu | 2012-09-25 |
| 8201111 | Table-based DFM for accurate post-layout analysis | Yung-Chin Hou, Ying-Chou Cheng, Ru-Gun Liu, Chih-Ming Lai, Yi-Kan Cheng +5 more | 2012-06-12 |
| 8001494 | Table-based DFM for accurate post-layout analysis | Yung-Chin Hou, Ying-Chou Cheng, Ru-Gun Liu, Chih-Ming Lai, Yi-Kan Cheng +5 more | 2011-08-16 |
| 6800496 | Characterization methodology for the thin gate oxide device | Chung-Shi Chiang, Ke-Wei Su, Jaw-Kang Her, Yu-Tai Chia | 2004-10-05 |