Issued Patents All Time
Showing 1–25 of 25 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12292483 | Circuit, semiconductor device and method for parameter PSRR measurement | Jaw-Juinn Horng, Yi-Hsiang Wang | 2025-05-06 |
| 12244312 | Low noise ring oscillator devices and methods | Yung-Shun Chen, Yung-Chow Peng | 2025-03-04 |
| 12228958 | Voltage reference temperature compensation circuits and methods | Jaw-Juinn Horng | 2025-02-18 |
| 12099792 | Electromigration evaluation methodology with consideration of both self-heating and heat sink thermal effects | Hsien Yu Tseng, Chun-Wei Chang, Szu-Lin Liu, Sheng-Feng Liu | 2024-09-24 |
| 11993867 | Spun ABPBI fibers and process for preparing the same | Prakash D. Trivedi, Mathew Abraham | 2024-05-28 |
| 11860238 | Circuit, semiconductor device and method for parameter PSRR measurement | Jaw-Juinn Horng, Yi-Hsiang Wang | 2024-01-02 |
| 11755051 | Voltage reference temperature compensation circuits and methods | Jaw-Juinn Horng | 2023-09-12 |
| 11687698 | Electromigration evaluation methodology with consideration of both self-heating and heat sink thermal effects | Hsien Yu Tseng, Chun-Wei Chang, Szu-Lin Liu, Sheng-Feng Liu | 2023-06-27 |
| 11677007 | Heat sink layout designs for advanced FinFET integrated circuits | Jaw-Juinn Horng | 2023-06-13 |
| 11474552 | Voltage reference temperature compensation circuits and methods | Jaw-Juinn Horng | 2022-10-18 |
| 11288437 | Electromigration evaluation methodology with consideration of both self-heating and heat sink thermal effects | Hsien Yu Tseng, Chun-Wei Chang, Szu-Lin Liu, Sheng-Feng Liu | 2022-03-29 |
| 11280847 | Circuit, semiconductor device and method for parameter PSRR measurement | Jaw-Juinn Horng, Yi-Hsiang Wang | 2022-03-22 |
| 11244944 | Temperature compensation circuits | Chia-Hsin Hu, Jaw-Juinn Horng | 2022-02-08 |
| 10923572 | Heat sink layout designs for advanced FinFET integrated circuits | Jaw-Juinn Horng | 2021-02-16 |
| 10867109 | Electromigration evaluation methodology with consideration of both self-heating and heat sink thermal effects | Hsien Yu Tseng, Chun-Wei Chang, Szu-Lin Liu, Sheng-Feng Liu | 2020-12-15 |
| 10268228 | Voltage reference circuit | Jaw-Juinn Horng | 2019-04-23 |
| 10163899 | Temperature compensation circuits | Chia-Hsin Hu, Jaw-Juinn Horng | 2018-12-25 |
| 10090221 | Semiconductor device with self-heat reducing layers | Jaw-Juinn Horng, Chung-Hui Chen | 2018-10-02 |
| 9864393 | Voltage reference circuit | Jaw-Juinn Horng | 2018-01-09 |
| 9791879 | MOS-based voltage reference circuit | Jaw-Juinn Horng, Chung-Hui Chen, Yung-Chow Peng | 2017-10-17 |
| 9594390 | Voltage reference circuit | Jaw-Juinn Horng | 2017-03-14 |
| 9536876 | Temperature detector and controlling heat | Yung-Chow Peng, Szu-Lin Liu, Jaw-Juinn Horng | 2017-01-03 |
| 9536790 | Semiconductor device with self-heat reducing layers | Jaw-Juinn Horng, Chung-Hui Chen | 2017-01-03 |
| 9378314 | Analytical model for predicting current mismatch in metal oxide semiconductor arrays | Jaw-Juinn Horng, Yung-Chow Peng, Shih-Cheng Yang, Chung-Kai Lin | 2016-06-28 |
| 8832619 | Analytical model for predicting current mismatch in metal oxide semiconductor arrays | Jaw-Juinn Horng, Yung-Chow Peng, Shih-Cheng Yang, Chung-Kai Lin | 2014-09-09 |