Issued Patents All Time
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7421383 | Method for extracting and modeling semiconductor device series resistance and for simulating a semiconductor device with use thereof | Cheng Hsiao, Ke-Wei Su | 2008-09-02 |
| 7141485 | Shallow trench isolation structure with low sidewall capacitance for high speed integrated circuits | Ke-Wei Su, Cheng Hsiao | 2006-11-28 |
| 6800496 | Characterization methodology for the thin gate oxide device | Chung-Shi Chiang, Ke-Wei Su, Chung-Kai Lin, Yu-Tai Chia | 2004-10-05 |