Issued Patents All Time
Showing 76–100 of 227 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11380666 | Fan-out package with cavity substrate | Techi Wong, Po-Yao Chuang, Shin-Puu Jeng, Meng-Wei Chou, Meng-Liang Lin | 2022-07-05 |
| 11362010 | Structure and formation method of chip package with fan-out feature | Meng-Liang Lin, Po-Yao Chuang, Yi-Wen Wu, Techi Wong, Shin-Puu Jeng | 2022-06-14 |
| 11322449 | Package with fan-out structures | Shin-Puu Jeng, Po-Yao Chuang, Techi Wong | 2022-05-03 |
| 11322447 | Dual-sided routing in 3D SiP structure | Po-Yao Chuang, Meng-Liang Lin, Yi-Wen Wu, Shin-Puu Jeng, Techi Wong | 2022-05-03 |
| 11282803 | Device, semiconductor package and method of manufacturing semiconductor package | Chia-Kuei Hsu, Ming-Chih Yew, Po-Yao Lin, Shin-Puu Jeng | 2022-03-22 |
| 11270953 | Structure and formation method of chip package with shielding structure | Po-Yao Chuang, Shin-Puu Jeng, Shuo-Mao Chen, Ming-Chih Yew | 2022-03-08 |
| 11264363 | Chip package structure with seal ring structure | Chen-Hua Yu, An-Jhih Su, Jing-Cheng Lin | 2022-03-01 |
| 11239173 | Structure and formation method of chip package with fan-out feature | Meng-Liang Lin, Po-Yao Chuang, Techi Wong, Shin-Puu Jeng | 2022-02-01 |
| 11239138 | Methods of packaging semiconductor devices and packaged semiconductor devices | Li-Hui Cheng, Jing-Cheng Lin | 2022-02-01 |
| 11217570 | Package structure and manufacturing method thereof | Wei-Yu Chen, An-Jhih Su, Chi-Hsi Wu, Der-Chyang Yeh, Li-Hsien Huang +2 more | 2022-01-04 |
| 11164754 | Fan-out packages and methods of forming the same | Ming-Chih Yew, Chia-Kuei Hsu, Shin-Puu Jeng, Po-Yao Chuang, Meng-Liang Lin +2 more | 2021-11-02 |
| 11164852 | Method of forming package structure | Jing-Cheng Lin | 2021-11-02 |
| 11158588 | Packaged semiconductor devices, methods of packaging semiconductor devices, and PoP devices | Jui-Pin Hung, Jing-Cheng Lin | 2021-10-26 |
| 11158587 | Packaged semiconductor devices, methods of packaging semiconductor devices, and PoP devices | Jui-Pin Hung, Jing-Cheng Lin | 2021-10-26 |
| 11114405 | Semiconductor package structure with twinned copper | Jung-Hua Chang, Jing-Cheng Lin | 2021-09-07 |
| 11114313 | Wafer level mold chase | Hsien-Wen Liu, Yi-Wen Wu, Shin-Puu Jeng | 2021-09-07 |
| 11114311 | Chip package structure and method for forming the same | Shih-Ting Hung, Shin-Puu Jeng, Techi Wong | 2021-09-07 |
| 11107798 | Semiconductor packages and methods of forming the same | Chen-Hua Yu, Jing-Cheng Lin | 2021-08-31 |
| 11101214 | Package structure with dam structure and method for forming the same | Techi Wong, Meng-Liang Lin, Yi-Wen Wu, Po-Yao Chuang, Shin-Puu Jeng | 2021-08-24 |
| 11094639 | Semiconductor package | Jing-Cheng Lin, Ying-Ching Shih, Szu-Wei Lu | 2021-08-17 |
| 11094625 | Semiconductor package with improved interposer structure | Yi-Wen Wu, Techi Wong, Po-Yao Chuang, Shih-Ting Hung, Shin-Puu Jeng | 2021-08-17 |
| 11075168 | InFO-POP structures with TIVs having cavities | Jing-Cheng Lin, Chen-Hua Yu | 2021-07-27 |
| 11075151 | Fan-out package with controllable standoff | Techi Wong, Meng-Wei Chou, Meng-Liang Lin, Po-Yao Chuang, Shin-Puu Jeng | 2021-07-27 |
| 11069673 | Semiconductor package and manufacturing method thereof | Li-Hui Cheng, Jing-Cheng Lin | 2021-07-20 |
| 11063007 | Semiconductor device and method of manufacture | Po-Yao Chuang, Shin-Puu Jeng | 2021-07-13 |