Issued Patents All Time
Showing 126–150 of 227 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10622297 | Semiconductor device and method | Jing-Cheng Lin, Chi-Hsi Wu, Chen-Hua Yu | 2020-04-14 |
| 10553569 | Multi-die structure and method for forming same | Chen-Hua Yu, Jing-Cheng Lin, Li-Hui Cheng | 2020-02-04 |
| 10541213 | Backside redistribution layer (RDL) structure | Jing-Cheng Lin | 2020-01-21 |
| 10535614 | Package and manufacturing method thereof | — | 2020-01-14 |
| 10535591 | Semiconductor device and method of manufacturing the same | Jing-Cheng Lin, Li-Hui Cheng | 2020-01-14 |
| 10535627 | Printing module, printing method and system of forming a printed structure | Jing-Cheng Lin, Li-Hui Cheng, Chih-Chien Pan | 2020-01-14 |
| 10529673 | Packaged semiconductor devices, methods of packaging semiconductor devices, and PoP devices | Jui-Pin Hung, Jing-Cheng Lin | 2020-01-07 |
| 10522476 | Package structure, integrated fan-out package and method of fabricating the same | Li-Hui Cheng, Jing-Cheng Lin | 2019-12-31 |
| 10522496 | Method for a stacked and bonded semiconductor device | Li-Hui Cheng, Jing-Cheng Lin | 2019-12-31 |
| 10515875 | Interconnect structure for package-on-package devices | Jui-Pin Hung, Jing-Cheng Lin, Yi-Jou Lin, Shuo-Mao Chen, Chiung-Han Yeh +1 more | 2019-12-24 |
| 10515937 | Semiconductor device and method of manufacture | Jing-Cheng Lin, Li-Hui Cheng, Porter Chen | 2019-12-24 |
| 10515923 | Method for forming semiconductor package structure with twinned copper layer | Jung-Hua Chang, Jing-Cheng Lin | 2019-12-24 |
| 10515904 | Method for forming chip package structure | Jing-Cheng Lin | 2019-12-24 |
| 10515901 | InFO-POP structures with TIVs having cavities | Jing-Cheng Lin, Chen-Hua Yu | 2019-12-24 |
| 10515827 | Method for forming chip package with recessed interposer substrate | Shin-Puu Jeng, Po-Yao Chuang, Feng-Cheng Hsu, Shuo-Mao Chen, Techi Wong | 2019-12-24 |
| 10468339 | Heterogeneous fan-out structure and method of manufacture | Po-Yao Chuang, Shin-Puu Jeng, Techi Wong | 2019-11-05 |
| 10361161 | Semiconductor device and method of manufacture | Jing-Cheng Lin, Chen-Hua Yu | 2019-07-23 |
| 10354982 | Integrated fan-out structure with guiding trenches in buffer layer | Feng-Cheng Hsu, Li-Hui Cheng, Jui-Pin Hung, Jing-Cheng Lin | 2019-07-16 |
| 10290610 | PoP device and method of forming the same | Li-Hsien Huang, An-Jhih Su, Der-Chyang Yeh, Hua-Wei Tseng, Li-Hui Cheng +2 more | 2019-05-14 |
| 10276511 | Package and manufacturing method thereof | — | 2019-04-30 |
| 10269778 | Package on package (PoP) bonding structures | Jing-Cheng Lin, Jui-Pin Hung | 2019-04-23 |
| 10269685 | Interconnect structure for package-on-package devices | Jui-Pin Hung, Jing-Cheng Lin, Yi-Jou Lin, Shuo-Mao Chen, Chiung-Han Yeh +1 more | 2019-04-23 |
| 10269587 | Integrated circuit packages and methods of forming same | Jing-Cheng Lin, Li-Hui Cheng | 2019-04-23 |
| 10204889 | Package structure and method of forming thereof | Jing-Cheng Lin | 2019-02-12 |
| 10170451 | Semiconductor device method of manufacture | Jing-Cheng Lin, Chen-Hua Yu | 2019-01-01 |