Issued Patents All Time
Showing 276–300 of 399 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9627355 | Package-on-package structure having polymer-based material for warpage control | Meng-Tse Chen, Yu-Chih Liu, Hui-Min Huang, Wei-Hung Lin, Jing Ruei Lu +1 more | 2017-04-18 |
| 9627234 | Method and apparatus for localized and controlled removal of material from a substrate | Hui-Min Huang, Chih-Wei Lin, Cheng-Ting Chen, Chung-Shi Liu | 2017-04-18 |
| 9607921 | Package on package interconnect structure | Wen-Hsiung Lu, Yi-Wen Wu, Chih-Wei Lin, Hsiu-Jen Lin, Chung-Shi Liu | 2017-03-28 |
| 9601353 | Packages with molding structures and methods of forming the same | Chih-Fan Huang, Cheng-Tar Wu, Chung-Shi Liu, Chen-Hua Yu | 2017-03-21 |
| 9598772 | Method for fabricating bump structure without UBM undercut | Chih-Wei Lin, Wen-Hsiung Lu, Chung-Shi Liu | 2017-03-21 |
| 9589862 | Interconnect structures and methods of forming same | Hsuan-Ting Kuo, Tsung-Yuan Yu, Hsien-Wei Chen, Wen-Hsiung Lu, Chung-Shi Liu | 2017-03-07 |
| 9583464 | Semiconductor packaging structure and method | Chun-Cheng Lin, Chung-Shi Liu, Kuei-Wei Huang, Cheng-Ting Chen, Wei-Hung Lin | 2017-02-28 |
| 9576910 | Semiconductor packaging structure and manufacturing method thereof | Chen-Hua Yu, Jui-Pin Hung | 2017-02-21 |
| 9576888 | Package on-package joint structure with molding open bumps | Meng-Tse Chen, Chun-Cheng Lin, Wei-Yu Chen, Ai-Tee Ang, Chung-Shi Liu | 2017-02-21 |
| 9576830 | Method and apparatus for adjusting wafer warpage | Hui-Min Huang, Chih-Wei Lin, Wen-Hsiung Lu, Chung-Shi Liu | 2017-02-21 |
| 9570413 | Packages with solder ball revealed through laser | Yu-Hsiang Hu, Wei-Yu Chen, Hung-Jui Kuo, Chung-Shi Liu | 2017-02-14 |
| 9570410 | Methods of forming connector pad structures, interconnect structures, and structures thereof | Chia-Lun Chang, Chung-Shi Liu, Hsiu-Jen Lin, Hsien-Wei Chen, Wei-Yu Chen | 2017-02-14 |
| 9559064 | Warpage control in package-on-package structures | Wei-Yu Chen, Yu-Hsiang Hu, Wei-Hung Lin, Chung-Shi Liu | 2017-01-31 |
| 9559005 | Methods of packaging and dicing semiconductor devices and structures thereof | Yu-Peng Tsai, Wen-Hsiung Lu, Hui-Min Huang, Wei-Hung Lin, Chung-Shi Liu | 2017-01-31 |
| 9543185 | Packaging process tools and systems, and packaging methods for semiconductor devices | Wei-Hung Lin, Kuei-Wei Huang, Chih-Wei Lin, Chun-Cheng Lin, Chung-Shi Liu | 2017-01-10 |
| 9538582 | Warpage control in the packaging of integrated circuits | Hsiu-Jen Lin, Cheng-Ting Chen, Wei-Yu Chen, Chien-Wei Lee, Chung-Shi Liu | 2017-01-03 |
| 9536865 | Interconnection joints having variable volumes in package structures and methods of formation thereof | Hsuan-Ting Kuo, Chung-Shi Liu, Hsiu-Jen Lin, Hsien-Wei Chen, Wei-Yu Chen +1 more | 2017-01-03 |
| 9536818 | Semiconductor package and method of forming the same | Wei-Hung Lin, Chung-Shi Liu, Mirng-Ji Lii, Chen-Hua Yu | 2017-01-03 |
| 9530762 | Semiconductor package, semiconductor device and method of forming the same | Chen-Hua Yu, Chung-Shi Liu, Chih-Fan Huang, Tsai-Tsung Tsai, Wei-Hung Lin | 2016-12-27 |
| 9524956 | Integrated fan-out structure and method | Hao-Jan Pei, Hui-Min Huang, Hsiu-Jen Lin, Chung-Shi Liu, Chen-Hua Yu | 2016-12-20 |
| 9508703 | Stacked dies with wire bonds and method | Chen-Hua Yu, Ming-Fa Chen, Sung-Feng Yeh, Meng-Tse Chen, Hui-Min Huang +2 more | 2016-11-29 |
| 9502394 | Package on-Package (PoP) structure including stud bulbs and method | Chen-Hua Yu, Mirng-Ji Lii, Chung-Shi Liu | 2016-11-22 |
| 9484227 | Dicing in wafer level package | Chia-Shen Cheng, An-Jhih Su, Chung-Shi Liu, Hsiu-Jen Lin, Hsien-Wei Chen +1 more | 2016-11-01 |
| 9484285 | Interconnect structures for wafer level package and methods of forming same | Meng-Tse Chen, Chih-Wei Lin, Hui-Min Huang, Chung-Shi Liu, Chen-Hua Yu | 2016-11-01 |
| 9472525 | Bump-on-trace structures with high assembly yield | Chih-Fan Huang, Chen-Shien Chen, Chung-Shi Liu, Tin-Hao Kuo, Yi-Teh Chou | 2016-10-18 |