Issued Patents All Time
Showing 26–50 of 137 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10748882 | Structure and formation method for chip package | Cheng-Lin Huang, Hsien-Wen Liu, Shin-Puu Jeng | 2020-08-18 |
| 10720403 | Integrated fan-out package structures with recesses in molding compound | Po-Hao Tsai, Li-Hui Cheng, Jing-Cheng Lin | 2020-07-21 |
| 10672723 | Semiconductor package | Jing-Cheng Lin, Chin-Chuan Chang | 2020-06-02 |
| 10636747 | Semiconductor package structure | Feng-Cheng Hsu, Shuo-Mao Chen, Shin-Puu Jeng, De-Dui Liao | 2020-04-28 |
| 10629541 | Semiconductor structure and manufacturing method thereof | Chen-Hua Yu, Kuo-Chung Yee | 2020-04-21 |
| 10622336 | Manufacturing method of semiconductor package | Feng-Cheng Hsu, Shin-Puu Jeng | 2020-04-14 |
| 10529673 | Packaged semiconductor devices, methods of packaging semiconductor devices, and PoP devices | Po-Hao Tsai, Jing-Cheng Lin | 2020-01-07 |
| 10522439 | Semiconductor package device | Nai-Wei Liu, Jing-Cheng Lin | 2019-12-31 |
| 10515875 | Interconnect structure for package-on-package devices | Jing-Cheng Lin, Po-Hao Tsai, Yi-Jou Lin, Shuo-Mao Chen, Chiung-Han Yeh +1 more | 2019-12-24 |
| 10515930 | Three-layer package-on-package structure and method forming same | Feng-Cheng Hsu, Shin-Puu Jeng | 2019-12-24 |
| 10510717 | Chip on package structure and method | Chen-Hua Yu, Der-Chyang Yeh, Kuo-Chung Yee | 2019-12-17 |
| 10504752 | Integrated passive device package and methods of forming same | Feng-Cheng Hsu, Shuo-Mao Chen, Shin-Puu Jeng | 2019-12-10 |
| 10497619 | Method of manufacturing a semiconductor device including through silicon plugs | Chen-Hua Yu, Chia-Lin Yu, Hung-Pin Chang, Chien Ling Hwang, Yung-Chi Lin | 2019-12-03 |
| 10475769 | Semiconductor package and manufacturing method of the same | Feng-Cheng Hsu, Shin-Puu Jeng | 2019-11-12 |
| 10368442 | Integrated circuit structure and method of forming | Chen-Hua Yu, Kuo-Chung Yee | 2019-07-30 |
| 10354982 | Integrated fan-out structure with guiding trenches in buffer layer | Po-Hao Tsai, Feng-Cheng Hsu, Li-Hui Cheng, Jing-Cheng Lin | 2019-07-16 |
| 10276516 | Semiconductor package | Jing-Cheng Lin, Chin-Chuan Chang | 2019-04-30 |
| 10269778 | Package on package (PoP) bonding structures | Jing-Cheng Lin, Po-Hao Tsai | 2019-04-23 |
| 10269685 | Interconnect structure for package-on-package devices | Jing-Cheng Lin, Po-Hao Tsai, Yi-Jou Lin, Shuo-Mao Chen, Chiung-Han Yeh +1 more | 2019-04-23 |
| 10163876 | Semiconductor structure and manufacturing method thereof | Shin-Puu Jeng, Feng-Cheng Hsu | 2018-12-25 |
| 10163711 | Methods of packaging semiconductor devices including placing semiconductor devices into die caves | Jing-Cheng Lin, Yi-Hang Lin, Tsan-Hua Tung | 2018-12-25 |
| 10163841 | Multi-chip package and method of formation | Jing-Cheng Lin, Chen-Hua Yu, Der-Chyang Yeh | 2018-12-25 |
| 10163857 | Multi-chip fan out package and methods of forming the same | Chen-Hua Yu, Jing-Cheng Lin | 2018-12-25 |
| 10163860 | Semiconductor package structure | Feng-Cheng Hsu, Shuo-Mao Chen, Shin-Puu Jeng | 2018-12-25 |
| 10153205 | Package with metal-insulator-metal capacitor and method of manufacturing the same | Chen-Hua Yu, Shang-Yun Hou, Wen-Chih Chiou, Der-Chyang Yeh, Chiung-Han Yeh | 2018-12-11 |